CA3130AE Intersil, CA3130AE Datasheet - Page 17

• Manufacturer Part Number: CA3130AE
• Description: IC OP AMP 15MHZ BIMOS 8-DIP
• Manufacturer: Intersil

Specifications of CA3130AE

• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Slew Rate: 30 V/µs
• Gain Bandwidth Product: 15MHz
• Current - Input Bias: 5pA
• Voltage - Input Offset: 2000µV
• Current - Supply: 10mA
• Current - Output / Channel: 45mA
• Voltage - Supply, Single/dual (±): 5 V ~ 16 V, ±2.5 V ~ 8 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Bandwidth: 15 MHz
• Common Mode Rejection Ratio: 90
• Current, Input Bias: 0.000005 μA
• Current, Input Offset: 0.5 pA
• Current, Output: 22 mA
• Current, Supply: 10 mA
• Number Of Amplifiers: Single
• Package Type: PDIP-8
• Resistance, Input: 1.5 Teraohms
• Temperature, Operating, Range: -55 to +125 °C
• Time, Rise: 0.09 μs
• Voltage, Gain: 320 kV/V
• Voltage, Input: -0.5 to 23 V
• Voltage, Noise: 23000 nV/sqrt Hz
• Voltage, Offset: 2 mV
• Voltage, Output Swing: 2 mV (Max.)
• Voltage, Output, High: 13.3 V
• Voltage, Output, Low: 0.002 V
• Voltage, Supply: 5 to 16 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Output Type: -
• -3db Bandwidth: -

NOTES:
10. Controlling dimension: MILLIMETER. Converted inch dimensions
N
1
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
5. The chamfer on the body is optional. If it is not present, a visual index
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
Small Outline Plastic Packages (SOIC)
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
0.25(0.010)
Publication Number 95.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
feature must be located within the crosshatched area.
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
are not necessarily exact.
2
-A-
INDEX
AREA
3
e
B
D
M
C A
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
SEATING PLANE
M
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
-C-
E
-B-
B S
For information regarding Intersil Corporation and its products, see www.intersil.com
A
H
A1
17
α
0.10(0.004)
0.25(0.010)
M
L
h x 45°
B
M
CA3130, CA3130A
C
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
A1
A
B
C
D
E
H
N
α
e
h
L
(JEDEC MS-012-AA ISSUE C)
0.0532
0.0040
0.013
0.0075
0.1890
0.1497
0.2284
0.0099
0.016
MIN
0°
0.050 BSC
INCHES
8
MAX
0.0688
0.0098
0.020
0.0098
0.1968
0.1574
0.2440
0.0196
0.050
8°
1.35
0.10
0.33
0.19
4.80
3.80
5.80
0.25
0.40
MILLIMETERS
MIN
0°
1.27 BSC
8
MAX
1.75
0.25
0.51
0.25
5.00
4.00
6.20
0.50
1.27
8°
Rev. 1 6/05
NOTES
9
3
4
5
6
7
-
-
-
-
-
-