CA3240AE Intersil, CA3240AE Datasheet - Page 6

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CA3240AE

Manufacturer Part Number
CA3240AE
Description
IC OP AMP DUAL 4.5MHZ 8-DIP
Manufacturer
Intersil
Datasheet

Specifications of CA3240AE

Amplifier Type
General Purpose
Number Of Circuits
2
Slew Rate
9 V/µs
Gain Bandwidth Product
4.5MHz
Current - Input Bias
10pA
Voltage - Input Offset
2000µV
Current - Supply
8mA
Current - Output / Channel
40mA
Voltage - Supply, Single/dual (±)
4 V ~ 36 V, ±2 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Output Type
-
-3db Bandwidth
-

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Application Information
Circuit Description
The schematic diagram details one amplifier section of the
CA3240. It consists of a differential amplifier stage using PMOS
transistors (Q
static discharge damage provided by zener diodes D
D
from transistors Q
source. This assures a high common-mode rejection ratio. The
output of the differential amplifier is coupled to the base of gain
stage transistor Q
supplies the required differential-to-single-ended conversion.
The gain stage transistor Q
load (Q
collector of Q
emitter-follower output stage. Pulldown for the output stage is
provided by two independent circuits: (1) constant-current-
connected transistors Q
sink transistor Q
pulldown current is constant at about 1mA for Q
from 0 to 18mA for Q
voltage between the output terminal and V+. The dynamic
current sink becomes active whenever the output terminal is
more negative than V+ by about 15V. When this condition
exists, transistors Q
sink current from the output terminal to V-. This current always
flows when the output is in the linear region, either from the
load resistor or from the emitter of Q
present. The purpose of this dynamic sink is to permit the
output to go within 0.2V (V
ground. When the load is returned to V+, it may be necessary
to supplement the 1mA of current from Q
the dynamic current sink (Q
placing a resistor (Approx. 2kΩ) between the output and V-.
Output Circuit Considerations
Figure 23 shows output current-sinking capabilities of the
CA3240 at various supply voltages. Output voltage swing to
the negative supply rail permits this device to operate both
power transistors and thyristors directly without the need for
level-shifting circuitry usually associated with the 741 series
of operational amplifiers.
Figure 3 shows some typical configurations. Note that a series
resistor, RL, is used in both cases to limit the drive available to
the driven device. Moreover, it is recommended that a series
diode and shunt diode be used at the thyristor input to prevent
large negative transient surges that can appear at the gate of
thyristors, from damaging the integrated circuit.
5
. Constant current bias is applied to the differential amplifier
3
and Q
9
13
and Q
4
directly drives the base of the compound
16
) to provide maximum open-loop gain. The
2
13
and its associated circuitry. The level of
and Q
21
by means of an NPN current mirror that
10
16
and Q
) with gate-to-source protection against
14
depending on the magnitude of the
5
CE
and Q
connected as a constant current
13
16
16
). This may be accomplished by
(sat)) of V- with a 2kΩ load to
has a high impedance active
6
are turned on causing Q
15
and (2) dynamic current-
18
if no load resistor is
15
in order to turn on
15
and varies
3
, D
CA3240, CA3240A
4
16
, and
to
Input Circuit Considerations
As indicated by the typical VICR, this device will accept
inputs as low as 0.5V below V-. However, a series current-
limiting resistor is recommended to limit the maximum input
terminal current to less than 1mA to prevent damage to the
input protection circuitry.
Moreover, some current-limiting resistance should be
provided between the inverting input and the output when
the CA3240 is used as a unity-gain voltage follower. This
resistance prevents the possibility of extremely large input-
signal transients from forcing a signal through the input-
protection network and directly driving the internal constant-
current source which could result in positive feedback via the
output terminal. A 3.9kΩ resistor is sufficient.
The typical input current is on the order of 10pA when the
inputs are centered at nominal device dissipation. As the
output supplies load current, device dissipation will increase,
raising the chip temperature and resulting in increased input
current. Figure 4 shows typical input-terminal current versus
ambient temperature for the CA3240.
FIGURE 3. METHODS OF UTILIZING THE V
120V
AC
CURRENT CAPABILITY OF THE CA3240 SERIES
CA3240
CA3240
V+
R
S
R
30V NO LOAD
L
R
L
LOAD
CE (SAT)
+HV
LOAD
March 4, 2005
MT
MT
SINKING
2
1
FN1050.6

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