X4323S8I Intersil, X4323S8I Datasheet - Page 7

• Manufacturer Part Number: X4323S8I
• Description: IC CPU SUPRV 32K EE RST LO 8SOIC
• Manufacturer: Intersil
• Type: Simple Reset/Power-On Resetr

Specifications of X4323S8I

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 100 ms Minimum
• Voltage - Threshold: 4.38V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 4. V
Control Register
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is
removed.
The Control Register is accessed at address FFFFh. It
can only be modified by performing a byte write opera-
tion directly to the address of the register and only one
data byte is allowed for each register write operation.
Prior to writing to the Control Register, the WEL and
RWEL bits must be set using a two step process, with
the whole sequence requiring 3 steps. See "Writing to
the Control Register" on page 9.
TRIP
Emax = Maximum Allowed V
Programming Sequence
Old V
New V
CC
CC
Applied + Error
Applied =
7
Error ≤ –Emax
TRIP
Error
NO
Set V
X4323, X4325
V
(V
TRIP
Apply 5V to V
Measured V
Decrement V
CC
CC
Desired V
goes active?
Desired V
Reset V
RESET pin
Sequence
Sequence
Set V
= V
Execute
Execute
= V
Programming
DONE
CC
CC
TRIP
YES
–Emax < Error < Emax
TRIP
- 50mV)
Applied =
TRIP
TRIP
TRIP
The user must issue a stop after sending this byte to
the register to initiate the nonvolatile cycle that stores
WD1, and WD0. The X4323, X4325 will not acknowl-
edge any data bytes written after the first byte is
entered.
CC
CC
-
Error ≥ Emax
Old V
New V
CC
Reset V
Sequence
CC
Execute
Applied - Error
Applied =
TRIP
May 25, 2006
FN8122.1