ISL9000AIRKJZ Intersil, ISL9000AIRKJZ Datasheet - Page 9

• Manufacturer Part Number: ISL9000AIRKJZ
• Description: IC REG LDO LN 2.85V/2.8V 10-DFN
• Manufacturer: Intersil

Specifications of ISL9000AIRKJZ

• Regulator Topology: Positive Fixed
• Voltage - Output: 2.85V, 2.8V
• Voltage - Input: 2.3 ~ 6.5 V
• Voltage - Dropout (typical): 0.25V @ 300mA, 0.2V @ 300mA
• Number Of Regulators: 2
• Current - Output: 300mA (Max)
• Current - Limit (min): 350mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Description
Typical Application
NUMBER
PIN
10
1
2
3
4
5
6
7
8
9
VIN (2.3 TO 6.5V)
ENABLE1
ENABLE2
NAME
CPOR
CBYP
POR1
POR2
GND
EN1
EN2
VO2
VO1
PIN
VIN
OFF
OFF
ON
ON
Open Drain Output (1mA)
Open Drain Output (1mA)
Low Voltage Compatible
Low Voltage Compatible
CMOS Input
CMOS Input
Analog I/O
Analog I/O
Analog I/O
Analog I/O
Analog I/O
9
C1
Ground
TYPE
C1, C4, C5: 1µF X5R CERAMIC CAPACITOR
C2: 0.1µF X7R CERAMIC CAPACITOR
C3: 0.01µF X7R CERAMIC CAPACITOR
C2
C3
Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
LDO-1 Enable.
LDO-2 Enable.
Reference Bypass Capacitor Pin:
Optionally connect capacitor of value 0.01µF to 1µF between this pin and GND to tune in
the desired noise and PSRR performance.
POR2 Delay Setting Capacitor Pin:
Connect a capacitor between this pin and GND to delay the POR2 output release after
LDO-2 output reaches 94% of its specified voltage level. (200ms delay per 0.01µF).
GND is the connection to system ground. Connect to PCB Ground plane.
Open-drain POR Output for LDO-1 (active-low):
Internally connected to VO1 through 100kΩ resistor.
Open-drain POR Output for LDO-2 (active-low):
Internally connected to VO2 through 100kΩ resistor.
LDO-2 Output:
Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
LDO-1 Output:
Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
1
2
3
4
5
VIN
EN1
EN2
CBYP
CPOR
ISL9000A
ISL9000A
POR2
POR1
GND
VO1
VO2
10
9
8
7
6
C4
C5
DESCRIPTION
V
V
OUT2
OUT1
V
V
OUT2
OUT1
TOO LOW
TOO LOW
OK
OK
V
V
RESET2
(200ms DELAY,
C3 = 0.01µF)
RESET1
(2ms DELAY)
OUT1
OUT2
March 11, 2008
FN6391.1