MAC7131MVF40 Freescale Semiconductor, MAC7131MVF40 Datasheet - Page 18

• Manufacturer Part Number: MAC7131MVF40
• Description: IC MCU 32BIT FLASH 208-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MAC7xxxr

Specifications of MAC7131MVF40

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: DMA, POR
• Number Of I /o: 128
• Program Memory Size: 544KB (544K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 32x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Electrical Characteristics
3.8.3
3.8.4
The time-out
or at the low level. The corresponding clock period with an ideal 50% duty cycle is twice this time-out value.
3.8.5
The timing for the clock quality check is derived from the oscillator and the VCO frequency range in
Table
18
NOTES:
1. If CLKSEL[PLLSEL] is set then the system clock (f
2. Percentage deviation from target frequency
3. PLL stabilization delay is highly dependent on operational requirement and external component values (for
4. f
5. f
Num C
K10 D PLLON Tracking mode stabilization delay
K11 D Charge pump current acquisition mode
K12 D Charge pump current tracking mode
K13 D Jitter fit VCO loop gain parameter
K14 D Jitter fit VCO loop frequency parameter
K15 C Jitter fit parameter 1
K16 C Jitter fit parameter 2
K1
K2
K3
K4
K5
K6
K7
K8
K9
J1a
example, crystal and XFC filter component values). Notes
configurations. Appropriate XFC filter values should be chosen based on operational requirement of system.
20. These numbers define the upper time limit for the individual check windows to complete.
OSC
OSC
or J1b). Throughout this document, t
D VCO locking range
D Lock Detector transition from Acquisition to Tracking mode
D Lock Detection
D Un-Lock Detection
D Lock Detector transition from Tracking to Acquisition mode
C PLLON Total Stabilization delay (Auto Mode)
D PLLON Acquisition mode stabilization delay
P Self Clock Mode frequency
= 4 MHz, f
= 4 MHz, f
PLL Characteristics
Crystal Monitor Time-out
Clock Quality Checker
PLL reference frequency, crystal oscillator range
Table 21
Clock Check Windows
VCO
VCO
Timeout Window
Check Window
shows the delay for the crystal monitor to trigger when the clock stops, either at the high
= 40 MHz (REFDV = 0x00, SYNR = 0x04), C
= 16 MHz (REFDV = 0x00, SYNR = 0x01), C
Min
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
6
Table 22. CRG Maximum Clock Quality Check Timings
Rating
Table 21. Crystal Monitor Time-Outs
Table 20. PLL Characteristics
SYS
Typ
10
is used to specify a unit of time equal to 1 ÷ f
3
Preliminary
SYS
9.1 to 20.0
0.46 to 1.0
3
3
Value
) is equal to f
4
and
5
S
S
Max
18.5
Symbol
VCO
show component values for a typical
= 2.2 nF, C
= 4.7 nF, C
|Δ
f
|Δ
f
VCO
|Δ
| i
| i
|Δ
f
t
t
SCM
REF
stab
Lock
acq
K
t
ch
ch
f
j
j
unt
unl
al
trk
1
2
1
, otherwise it is equal to f
1
|
|
|
|
|
1
|
P
P
Min
0.5
0.5
= 220 pF, R
= 470 pF, R
—
—
—
—
—
—
—
—
—
2
8
3
0
6
Unit
ms
s
Unit
–195
μs
0.5
0.3
0.2
38.5
Typ
126
3.5
SYS
—
—
—
—
—
—
—
—
—
S
S
4
4
4
= 5.6 K
= 2.7 K
.
Freescale Semiconductor
OSC
(table
Max
0.12
Ω
Ω
5.5
1.5
2.5
1.3
3
1
2
16
50
—
—
—
—
4
8
.
.
5
5
5
Table
MHz/V
Unit
MHz
MHz
MHz
MHz
%
%
%
%
%
%
ms
ms
ms
μA
μA
19,
2
2
2
2
4
4