MAC7131MVF40 Freescale Semiconductor, MAC7131MVF40 Datasheet - Page 28

• Manufacturer Part Number: MAC7131MVF40
• Description: IC MCU 32BIT FLASH 208-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MAC7xxxr

Specifications of MAC7131MVF40

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: DMA, POR
• Number Of I /o: 128
• Program Memory Size: 544KB (544K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 32x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Electrical Characteristics
3.10.3 ATD Timing Specifications
28
NOTES:
1. N
2. Time prior to the end of a conversion that ETRIG must be negated in order to prevent the start of another conversion.
Num C
T1
T2
T3
T4
minimum period between conversions when using level-sensitive triggering, ETRIG must remain asserted this long.
CONVn
Falling Edge Active
Conversion Activity
Conversion Activity
Conversion Activity
D ETRIG Period (Level-Sensitive Trigger Mode)
D ETRIG Minimum Pulse Width
D ETRIG Level Recovery
D Conversion Start Delay
Edge Sensitive
Level Sensitive
Level Sensitive
denotes 8- or 10-bit conversion time (refer to specifications N4, N5,
Complete Flag
Complete Flag
Low Active
Low Active
Sequence
Sequence
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Table 31. ATD External Trigger Timing Specifications
ETRIG
ETRIG
ETRIG
ANn_x
ANn_x
ANn_x
ASCIF
ASCIF
Parameter
Figure 10. ATD External Trigger Timing Diagram
Edge-Sensitive Trigger Mode
Level-Sensitive Trigger Mode
2
T2
T2
T4
T4
T4
Preliminary
Symbol
T
PERIOD
t
t
t
DLY
PW
LR
T1
1 + N
T4
T4
T3
Min
CONVn
—
1
2
1
P4
and P5). In order to achieve the
1
Max
—
—
—
—
2
Freescale Semiconductor
f
f
f
f
ATDCLK
ATDCLK
ATDCLK
ATDCLK
Unit
Cycles
Cycles
Cycles
Cycles