T48C862M-R4-TNQ Atmel, T48C862M-R4-TNQ Datasheet - Page 28

IC MON TIRE PRESS 433MHZ 24-SOIC

T48C862M-R4-TNQ

Manufacturer Part Number
T48C862M-R4-TNQ
Description
IC MON TIRE PRESS 433MHZ 24-SOIC
Manufacturer
Atmel
Datasheet

Specifications of T48C862M-R4-TNQ

Frequency
433MHz
Modulation Or Protocol
FM, FSK
Data Rate - Maximum
32 kBaud
Power - Output
10dBm
Current - Transmitting
9.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
1KB EEPROM, 1KB RAM
Voltage - Supply
2 V ~ 4 V
Operating Temperature
-40°C ~ 125°C
Package / Case
24-SOIC (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Applications
-
Clock Management
Clock Management Register
(CM)
28
T48C862-R4 [Preliminary]
Figure 26. 32-kHz Crystal Oscillator
The clock management register controls the system clock divider and synchronization
stage. Writing to this register triggers the synchronization cycle.
Table 6. Core Speed Select
CM:
NSTOP
CCS
CSS1
CSS0
CSS1
0
1
1
0
Not STOP peripheral clock
NSTOP = 0, stops the peripheral clock while the core is in SLEEP mode
NSTOP = 1, enables the peripheral clock while the core is in SLEEP mode
Core Clock Select
CCS = 1, the internal RC-oscillator 1 generates SYSCL
CCS = 0, the 4-MHz crystal oscillator, the 32-kHz crystal oscillator, an external
clock source or the internal RC-oscillator 2 with the external resistor at OSC1
generates SYSCL dependent on the setting of OS0 and OS1 in the system
configuration register
Core Speed Select 1
Core Speed Select 0
Configurable
NSTOP
Bit 3
*
32 kHz
XTAL
OSC1
OSC2
CSS0
0
1
0
1
CCS
Bit 2
C1
C2
*
*
Oscin
Oscout
oscillator
32-kHz
CSS1
Bit 1
32Out
Auxiliary register address: "3"hex
Divider
CSS0
Bit 0
16
8
4
2
32Out
Reset value: 1111b
Reset value
4551C–4BMCU–01/04
Note

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