MFRC52301HN1,151 NXP Semiconductors, MFRC52301HN1,151 Datasheet - Page 62

• Manufacturer Part Number: MFRC52301HN1,151
• Description: IC MIFARE READER 32-HVQFN
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC52301HN1,151

• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Operating Current: 7 mA
• Operating Voltage: 2.5 V to 3.6 V
• Product: RFID Readers
• Wireless Frequency: 13.56 MHz
• Interface Type: RS-232, I2C
• Data Rate: 100 Kbps
• Operating Temperature Range: - 25 C to +85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Rf Type: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4766; 935282956151; MFRC52301HN1

NXP Semiconductors
MFRC523_34
Product data sheet
PUBLIC
9.2.4.5 TestPinValueReg register
9.2.4.6 TestBusReg register
9.2.4.7 AutoTestReg register
Defines the high and low values for the test port D1 to D7 when it is used as I/O.
Table 124. TestPinValueReg register (address 34h); reset value: 00h bit allocation
Table 125. TestPinValueReg register bit descriptions
Shows the status of the internal test bus.
Table 126. TestBusReg register (address 35h); reset value: xxh bit allocation
Table 127. TestBusReg register bit descriptions
Controls the digital self-test.
Table 128. AutoTestReg register (address 36h); reset value: 40h bit allocation
Bit
Symbol
Access
Bit
7
6 to 1 TestPinValue[5:0]
0
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol
Access
Symbol
UseIO
reserved
reserved
Symbol
TestBus[7:0]
UseIO
R/W
7
7
7
-
All information provided in this document is subject to legal disclaimers.
AmpRcv
Rev. 3.5 — 24 September 2010
R/W
6
6
6
Value Description
1
-
-
Description
shows the status of the internal test bus. The test bus is selected using
the TestSel2Reg register; see
reserved EOFSOF
115235
enables the I/O functionality for the test port when one of the
serial interfaces is used. The input/output behavior is defined
by value TestPinEn[5:0] in the TestPinEnReg register
defines the value of the test port when it is used as I/O and
each output must be enabled by TestPinEn[5:0] in the
TestPinEnReg register
Remark: Reading the register indicates the status of pins D6
to D1 if the UseIO bit is set to logic 1. If the UseIO bit is set to
logic 0, the value of the TestPinValueReg register is read back.
reserved for future use
5
5
5
-
TestPinValue[5:0]
Adjust
R/W
4
4
TestBus[7:0]
4
R/W
R
Section 16.1 on page 79
3
3
3
2
2
2
SelfTest[3:0]
Contactless reader IC
R/W
MFRC523
© NXP B.V. 2010. All rights reserved.
1
1
1
reserved
62 of 97
0
0
0
-