XR20M1172IL32-F Exar Corporation, XR20M1172IL32-F Datasheet - Page 18

• Manufacturer Part Number: XR20M1172IL32-F
• Description: IC UART FIFO I2C/SPI 64B 32QFN
• Manufacturer: Exar Corporation

Specifications of XR20M1172IL32-F

• Number Of Channels: 2, DUART
• Package / Case: 32-VFQFN Exposed Pad
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 1.62 V ~ 3.63 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 16 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.62 V
• Supply Current: 250 uA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• No. Of Channels: 2
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 1.62V To 3.63V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

XR20M1172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control
features is enabled to fit specific application requirement (see
•
•
If using the Auto RTS interrupt:
•
The RTS# pin will not be forced HIGH (RTS off) until the receive FIFO reaches the Halt Level (TCR[3:0]). The
RTS# pin will return LOW after the RX FIFO is unloaded to the Resume Level (TCR[7:4]). Under these
conditions, the M1172 will continue to accept data if the remote UART continues to transmit data. It is the
responsibility of the user to ensure that the Halt Level is greater than the Resume Level. If interrupts are used,
it is recommended that Halt Level > RX Trigger Level > Resume Level. The Auto RTS function is initiated
when the RTS# output pin is asserted LOW (RTS On).
Automatic CTS flow control is used to prevent data overrun to the remote receiver FIFO. The CTS# input is
monitored to suspend/restart the local transmitter. The auto CTS flow control feature is selected to fit specific
application requirement (see
•
If using the Auto CTS interrupt:
•
F
2.9
2.10
2.11
IGURE
Enable auto RTS flow control using EFR bit-6.
The auto RTS function must be started by asserting RTS# output pin (MCR bit-1 to logic 1 after it is enabled).
Enable RTS interrupt through IER bit-6 (after setting EFR bit-4). The UART issues an interrupt when the
RTS# pin makes a transition from low to high: ISR bit-5 will be set to logic 1.
Enable auto CTS flow control using EFR bit-7.
Enable CTS interrupt through IER bit-7 (after setting EFR bit-4). The UART issues an interrupt when the
CTS# pin is de-asserted (HIGH): ISR bit-5 will be set to 1, and UART will suspend transmission as soon as
Receive Data
16X or 8X or 4X Clock
Byte and Errors
64 bytes by 11-bit wide
16. R
Auto RTS (Hardware) Flow Control
Auto RTS Halt and Resume
Auto CTS Flow Control
( DLD[5:4] )
ECEIVER
FIFO
O
PERATION IN
Figure
Receive Data Shift
Register (RSR)
Data FIFO
Receive
Receive
FIFO
17):
Data
AND
A
Validation
Resume Level
Data falls to
Trigger=16
UTO
Data fills to
Data Bit
Halt Level
FIFO
Example
RTS F
18
: - RX FIFO trigger level selected at 16 bytes
LOW
RTS# re-asserts when data falls to the Resume
Enable by EFR bit-6=1, MCR bit-1.
Level to restart remote transmitter.
to suspend remote transmitter.
RTS# de-asserts when data fills to the Halt Level
Enable by EFR bit-6=1, MCR bit-1.
RHR Interrupt (ISR bit-2) programmed for
(See Note Below)
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
Figure
C
ONTROL
17):
M
ODE
Receive Data Characters
RXFIFO1
REV. 1.0.1