XR20M1172IL32-F Exar Corporation, XR20M1172IL32-F Datasheet - Page 36

• Manufacturer Part Number: XR20M1172IL32-F
• Description: IC UART FIFO I2C/SPI 64B 32QFN
• Manufacturer: Exar Corporation

Specifications of XR20M1172IL32-F

• Number Of Channels: 2, DUART
• Package / Case: 32-VFQFN Exposed Pad
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 1.62 V ~ 3.63 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 16 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.62 V
• Supply Current: 250 uA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• No. Of Channels: 2
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 1.62V To 3.63V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

XR20M1172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
LSR[7]: Receive FIFO Data Error Flag
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This register provides the current state of the modem interface input signals. Lower four bits of this register are
used to indicate the changed information. These bits are set to a logic 1 whenever a signal from the modem
changes state. These bits may be used for general purpose inputs when they are not used with modem
signals.
MSR[0]: Delta CTS# Input Flag
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MSR[1]: Delta DSR# Input Flag
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MSR[2]: Delta RI# Input Flag
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MSR[3]: Delta CD# Input Flag
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MSR[4]: CTS Input Status
CTS# pin may function as automatic hardware flow control signal input if it is enabled and selected by Auto
CTS (EFR bit-7). Auto CTS flow control allows starting and stopping of local data transmissions based on the
modem CTS# signal. A HIGH on the CTS# pin will stop UART transmitter as soon as the current character has
finished transmission, and a LOW will resume data transmission. Normally MSR bit-4 bit is the complement of
the CTS# input. However in the loopback mode, this bit is equivalent to the RTS# bit in the MCR register. The
CTS# input may be used as a general purpose input when the modem interface is not used.
MSR[5]: DSR Input Status
Normally this bit is the complement of the DSR# input. In the loopback mode, this bit is equivalent to the DTR#
bit in the MCR register. The DSR# input may be used as a general purpose input when the modem interface is
not used.
MSR[6]: RI Input Status
Normally this bit is the complement of the RI# input. In the loopback mode this bit is equivalent to bit-2 in the
MCR register. The RI# input may be used as a general purpose input when the modem interface is not used.
4.9
Logic 0 = No FIFO error (default).
Logic 1 = A global indicator for the sum of all error bits in the RX FIFO. At least one parity error, framing error
or break indication is in the FIFO data. This bit clears when there is no more error(s) in any of the bytes in the
RX FIFO.
Logic 0 = No change on CTS# input (default).
Logic 1 = The CTS# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3).
Logic 0 = No change on DSR# input (default).
Logic 1 = The DSR# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3).
Logic 0 = No change on RI# input (default).
Logic 1 = The RI# input has changed from a LOW to HIGH, ending of the ringing signal. A modem status
interrupt will be generated if MSR interrupt is enabled (IER bit-3).
Logic 0 = No change on CD# input (default).
Logic 1 = Indicates that the CD# input has changed state since the last time it was monitored. A modem
status interrupt will be generated if MSR interrupt is enabled (IER bit-3).
Modem Status Register (MSR) - Read Only
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REV. 1.0.1