PK40X256VMD100 Freescale Semiconductor, PK40X256VMD100 Datasheet

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... Hardware CRC module to support fast cyclic redundancy checks – 128-bit unique identification (ID) number per chip This document contains information on a new product. Specifications and information herein are subject to change without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K40P100M100SF2 Rev. 5, 5/2011 K40P100M100SF2 • ...

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... I2S switching specifications................................55 6.9 Human-machine interfaces (HMI)......................................57 6.9.1 TSI electrical specifications................................57 6.9.2 LCD electrical characteristics.............................58 7 Dimensions...............................................................................59 7.1 Obtaining package dimensions.........................................59 8 Pinout........................................................................................59 8.1 K40 Signal Multiplexing and Pin Assignments..................59 8.2 K40 Pinouts.......................................................................64 9 Revision History........................................................................65 Preliminary Freescale Semiconductor, Inc. ...

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... Qualification status K## Kinetis family A Key attribute M Flash memory type K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K40 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • ...

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... LL = 100 LQFP ( mm) • 121 MAPBGA ( mm) • 144 LQFP ( mm) • 144 MAPBGA ( mm) • 196 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Preliminary Values Freescale Semiconductor, Inc. ...

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... WP pulldown current 3.3 Definition: Attribute An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. ...

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... Measured characteristic K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 6 Min. — 7 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Max. Unit pF Max. Unit V Freescale Semiconductor, Inc. ...

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... Typical values are provided as design guidelines and are neither tested nor guaranteed. 3.8.1 Example 1 This is an example of an operating behavior that includes a typical value: K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Normal Limited operating operating range ...

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... Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 8 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

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... Description V Digital supply voltage DD I Digital supply current DD V Digital input voltage (except RESET, EXTAL, and XTAL) DIO K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. –55 — — Min. — Min. -2000 -500 -100 Table continues on the next page... ...

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... DD -5 Table continues on the next page... Preliminary Min. Max. Unit –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — V — V 0.35 × 0.3 × — — mA Freescale Semiconductor, Inc. ...

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... LVW4H V Low-voltage inhibit reset/recover hysteresis — HYSH high range V Falling low-voltage detect threshold — low range LVDL (LVDV=00) K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. -5 — -25 — 1.2 TBD through a ESD protection diode. There is no diode SS (=V -0 ...

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... OL = 2mA — OL — = 0.6mA OL Table continues on the next page... Preliminary Max. Unit Notes 1 TBD V TBD V TBD V TBD V mV TBD V TBD μs Max. Unit Notes TBD V Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V Freescale Semiconductor, Inc. ...

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... RUN → VLLS2 → RUN • RUN → VLLS2 • VLLS2 → RUN RUN → VLLS3 → RUN • RUN → VLLS3 • VLLS3 → RUN K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. — — — — 20 ...

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... Table continues on the next page... Preliminary Max. Unit Notes 4.1 μs 5.9 μs 4.1 μs 4.2 μs 4.1 μs 5.8 μs Max. Unit Notes TBD TBD mA TBD mA 3 TBD mA TBD mA 4 TBD mA TBD mA TBD mA TBD mA 2 TBD mA 5 Freescale Semiconductor, Inc. ...

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... The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See each module's specification for its supply current. K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. Max. ...

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... MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) • All peripheral clocks disabled except FTFL • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 16 Preliminary Freescale Semiconductor, Inc. ...

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... MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE) • All peripheral clocks enabled but peripherals are not in active operation • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Preliminary General 17 ...

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... DD A OSC K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 18 Frequency Typ. band (MHz) 0.15–50 TBD 50–150 TBD 150–500 TBD 500–1000 TBD 0.15–1000 TBD = 96 MHz SYS Preliminary Unit Notes dBμ dBμV dBμV dBμV — Freescale Semiconductor, Inc. ...

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... System and core clock SYS f Bus clock BUS f Flash clock FLASH f LPTMR clock LPTMR K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Table 8. Capacitance attributes Min. Normal run mode — 20 — — — VLPR mode — — — ...

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... K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 20 Min. Max. 1.5 — 100 — 16 — 100 — 2 — — 12 — TBD — 36 — TBD — 32 — TBD — 36 — TBD Preliminary Unit Notes Bus clock 1 cycles Bus clock cycles Freescale Semiconductor, Inc. ...

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... Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate temperature used for the case temperature. The value includes the thermal resistance of the interface material between the top of the package and the cold plate. K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Description 100 LQFP Thermal ...

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... Clock and data rise time r T Clock and data fall time f T Data setup s T Data hold h Figure 3. TRACE_CLKOUT specifications K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 22 Min. Frequency dependent 2 2 — — Preliminary Max. Unit MHz — ns — — ns — ns Freescale Semiconductor, Inc. ...

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... J14 TRST setup time (negation) to TCLK high Table 14. JTAG full voltage range electricals Symbol Description Operating voltage K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Ts Th Table continues on the next page... Preliminary Ts Th Min ...

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... K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 Figure 5. Test clock input timing Preliminary Min. Max. Unit MHz 1/J1 — — — ns 12.5 — ns — — — ns — — — ns 1.4 — ns — 22.1 ns — 22.1 ns 100 — — Freescale Semiconductor, Inc. ...

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... Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing TCLK TDI/TMS TDO TDO TDO K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing Preliminary ...

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... Table continues on the next page... Preliminary Max. Unit Notes — kHz — 39.0625 kHz — µA 4 µs 1 ± 0 dco ± 0 dco ± 3 dco ± TBD %f 2 dco — 4 MHz — 5 MHz Freescale Semiconductor, Inc. ...

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... MHz, VDIV multiplier = 48) I PLL operating current pll • PLL @ 48 MHz (f osc_hi_1 2 MHz, VDIV multiplier = 24) f PLL reference frequency range pll_ref K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — TBD — TBD (3/ ints_t (16/5) x ...

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... Min. Typ. 1.71 — Table continues on the next page... Preliminary Max. Unit Notes 10 — ps — — ps — ps ± 2.98 % ± 5. 1075( pll_ref Max. Unit Notes 3.6 V Freescale Semiconductor, Inc. ...

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... Series resistor — low-frequency, high-gain mode (HGO=1) Series resistor — high-frequency, low-power mode (HGO=0) Series resistor — high-frequency, high-gain mode (HGO=1) K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 500 — ...

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... F Min — 40 — — — — Preliminary Typ. Max. Unit Notes 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz — 8 MHz — 32 MHz — 50 MHz 750 — 250 — ms 0.6 — — ms Freescale Semiconductor, Inc ...

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... Flash timing specifications — program and erase The following specifications represent the amount of time the internal charge pumps are active and do not include command overhead. K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...

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... TBD — 320 1600 — — 35 — TBD TBD — TBD TBD — TBD TBD — TBD TBD Preliminary Unit Notes μ Unit Notes ms μs 1 μs 1 μs 1 μ μs 1 μ μs 1 μs μs μs μs Freescale Semiconductor, Inc. ...

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... EZP_CK high to EZP_D input invalid (hold) EP7 EZP_CK low to EZP_Q output valid (setup) EP8 EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Typ. 10 Min. Max. 1 Typ. ...

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... All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy specifications. K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 34 EP3 EP2 EP4 EP9 EP7 EP8 EP5 EP6 Figure 9. EzPort Timing Diagram Table 25 and Preliminary Table 26 are achievable on the Table 27 Freescale Semiconductor, Inc. and ...

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... The results in this datasheet were derived from a system which has <8 Ω analog source resistance. The R C time constant should be kept to <1ns. AS K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. ...

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... Min. Typ. 0.215 — 1.2 2.4 3.0 4.0 2.4 5.2 4.4 6.2 Table continues on the next page... Preliminary ADIN ADIN ADIN ADIN ADIN , REFL SSA 2 Max. Unit Notes 1 3 MHz ADACK f ADACK 7.3 MHz 6.1 MHz 9.5 MHz Freescale Semiconductor, Inc. ...

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... See ENOB SINAD plus distortion THD Total harmonic 16 bit differential mode distortion • Avg=32 16 bit single-ended mode • Avg=32 K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ±0.8 ± ...

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... Min. 1 Typ. 1.71 — VREF_OU VREF_OU VREF_OU T T Table continues on the next page... Preliminary = V ) (continued) SSA 2 Max. Unit Notes 5 — dB — leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV Max. Unit Notes 3 Freescale Semiconductor, Inc. ...

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... ADC with PGA characteristics Table 28. 16-bit ADC with PGA characteristics Symbol Description Conditions I Supply current Low power DDA_PGA (ADC_PGA[PGALPb]=0) K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. V — SSA V — SSA — ...

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... TBD mV Output offset = V *(Gain+1) OFS 10 µs 5 TBD ppm/° 50°C TBD ppm/°C TBD ppm/° 50°C, ADC Averaging=32 TBD %/V V from 1.71 DDA to 3.6V TBD %/ leakage AS In current (refer to the MCU's voltage and current operating ratings) Freescale Semiconductor, Inc. ...

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... Limit the input signal swing so that the PGA does not saturate during operation. Input signal swing is dependent on the PGA reference voltage and gain setting. K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. ...

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... DD Preliminary Typ. Max. Unit — 3.6 V — 200 μA — 20 μA — — — — — — mV — — V — 0 200 ns 250 600 ns — 40 μs 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 13. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 00 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

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... The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV Calculated by a best fit curve from V K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — ...

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... Peripheral operating requirements and behaviors 6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C Figure 15. Typical INL error vs. digital code K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 46 Preliminary Freescale Semiconductor, Inc. ...

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... Table 33. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page ...

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... Max. Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 17 — TBD ppm/year — TBD µA — 1 — TBD — TBD — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. 1 ...

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... VREGIN = 5.0 V and temperature=25C • Across operating voltage and temperature I Maximum load current — Run mode LOADrun I Maximum load current — Standby mode LOADstby K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. TBD 0 14.25 0.25 Min ...

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... Min. 1.71 — BUS (t / SCK ( − BUS − BUS 4 — Table continues on the next page... Preliminary Max. Unit Notes 3.6 V 3 8.16 μF 100 mΩ TBD mA . Load Max. Unit Notes 3 12.5 MHz — SCK/2) — — Freescale Semiconductor, Inc. ...

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... DS13 DSPI_SIN to DSPI_SCK input setup DS14 DSPI_SCK to DSPI_SIN input hold DS15 DSPI_SS active to DSPI_SOUT driven DS16 DSPI_SS inactive to DSPI_SOUT not driven K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min DS1 DS2 DS8 ...

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... DS14 First data Data Min. 2.7 — BUS (t /2) − 2 SCK ( − BUS − BUS 2 — −2 TBD 0 Preliminary DS9 DS16 DS11 Last data Last data Max. Unit Notes 3 MHz — / SCK — — 8.5 ns — ns — ns — ns Freescale Semiconductor, Inc. ...

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... DSPI_SS inactive to DSPI_SOUT not driven DSPI_SS DSPI_SCK (CPOL=0) DSPI_SOUT DS13 DSPI_SIN Figure 22. DSPI classic SPI timing — slave mode K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS1 DS2 DS8 Data Last data First data DS5 ...

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... SDHC input setup time ISU SD8 t SDHC input hold time IH K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 54 Min. 2.7 Card input clock — — Preliminary Max. Unit 3.6 V 400 kHz 25 MHz 20 MHz 400 kHz — ns — 6.5 ns — ns — ns Freescale Semiconductor, Inc. ...

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... I2S_BCLK to I2S_TXD valid S8 I2S_BCLK to I2S_TXD invalid S9 I2S_RXD/I2S_FS input setup before I2S_BCLK S10 I2S_RXD/I2S_FS input hold after I2S_BCLK K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors SD3 SD2 SD1 SD6 SD7 SD8 Figure 23. SDHC timing ...

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... I2S_RXD hold after I2S_BCLK K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 S10 2 S timing — master mode Table 44 slave mode timing Preliminary S6 S10 S8 Min. Max. Unit 2.7 3 — ns SYS 45% 55% MCLK period 10 — — ns — — — — ns Freescale Semiconductor, Inc. ...

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... Maximum sensitivity @ 20 pF electrode 0 MaxSens Maximum sensitivity Res Resolution T Response time @ 20 pF Con20 K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors S11 S12 S15 S16 S18 2 S timing — slave modes Min. Typ. ...

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... Table continues on the next page... Preliminary Max. Unit Notes — μA TBD μ μA, REFCHRG = 4 128, Max. Unit Notes 58 Hz — — 8000 1.15 V 1.85 V — IREG — µA 4 — µA — µA Freescale Semiconductor, Inc. ...

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... Package dimensions are provided in package drawings. To find a package drawing search for the drawing’s document number: If you want the drawing for this package 100-pin LQFP 8 Pinout K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. — 0.28 — 2.98 2.0 − ...

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... ALT1 ALT2 ALT3 ALT4 SPI1_PCS1 UART1_TX SDHC0_D1 SPI1_SOUT UART1_RX SDHC0_D0 SPI1_SCK UART1_CTS SDHC0_DCL _b K SPI1_SIN UART1_RTS SDHC0_CM _b D PTE4 SPI1_PCS0 UART3_TX SDHC0_D3 PTE5 SPI1_PCS2 UART3_RX SDHC0_D2 PTE6 SPI1_PCS3 UART3_CTS I2S0_MCLK _b Preliminary ALT5 ALT6 ALT7 EzPort I2C1_SDA I2C1_SCL I2S0_CLKIN Freescale Semiconductor, Inc. ...

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... ADC1_SE17 ADC1_SE17 PTA17 48 VDD VDD VDD 49 VSS VSS VSS 50 PTA18 EXTAL EXTAL 51 PTA19 XTAL XTAL K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 CAN1_TX UART4_TX CAN1_RX UART4_RX PTE26 UART4_CTS _b PTA0 UART0_CTS FTM0_CH5 _b PTA1 UART0_RX ...

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... Preliminary ALT5 ALT6 ALT7 EzPort FTM1_QD_P LCD_P0 HA FTM1_QD_P LCD_P1 HB FTM0_FLT3 LCD_P2 FTM0_FLT0 LCD_P3 LCD_P7 LCD_P8 LCD_P9 FTM0_FLT1 LCD_P10 FTM0_FLT2 LCD_P11 EWM_IN LCD_P12 EWM_OUT_ LCD_P13 b FTM2_QD_P LCD_P14 HA FTM2_QD_P LCD_P15 HB CMP0_OUT LCD_P16 CMP1_OUT LCD_P17 CMP2_OUT LCD_P18 LCD_P19 LCD_P20 LCD_P21 LCD_P22 Freescale Semiconductor, Inc. ...

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... PTD5 LCD_P45/ LCD_P45/ ADC0_SE6b ADC0_SE6b 99 PTD6 LCD_P46/ LCD_P46/ ADC0_SE7b ADC0_SE7b 100 PTD7 LCD_P47 LCD_P47 K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTC3 SPI0_PCS1 UART1_RX FTM0_CH2 PTC4 SPI0_PCS0 UART1_TX FTM0_CH3 PTC5 SPI0_SCK LPT0_ALT2 PTC6 ...

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... K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 64 Preliminary 75 VLL3 VSS 74 73 PTC3 PTC2 72 71 PTC1 PTC0 70 69 PTB23 PTB22 68 67 PTB21 PTB20 66 65 PTB19 PTB18 64 PTB17 63 PTB16 62 PTB11 61 PTB10 60 PTB9 59 PTB8 58 PTB7 57 56 PTB3 PTB2 55 PTB1 54 PTB0 53 RESET_b 52 PTA19 51 Freescale Semiconductor, Inc. ...

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... Changed Reference oscillator current source base current spec and added Low- power current adder footer in "TSI electrical specifications" table • Added LCD glass capacitance footnote K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Table 47. Revision History footnote in "Voltage and Current Operating Requirements" table. IC spec in " ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...