PK40N512VMD100 Freescale Semiconductor, PK40N512VMD100 Datasheet

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... External watchdog monitor – Software watchdog – Low-leakage wakeup unit This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K40P144M100SF2 Rev. 4, 3/2011 K40P144M100SF2 • ...

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... USB full-/low-speed On-the-Go controller with on-chip transceiver – Two Controller Area Network (CAN) modules – Three SPI modules – Two I2C modules – Five UART modules – Secure Digital host controller (SDHC) – I2S module K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 2 Preliminary Freescale Semiconductor, Inc. ...

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... General switching specifications.........................20 5.3 Thermal specifications.......................................................21 5.3.1 Thermal operating requirements.........................21 5.3.2 Thermal attributes...............................................21 K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Table of Contents 6 Peripheral operating requirements and behaviors....................21 6.1 Core modules....................................................................22 6.1.1 Debug trace timing specifications.......................22 6.1.2 JTAG electricals..................................................22 6 ...

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... K40 Signal Multiplexing and Pin Assignments..................65 8.2 K40 Pinouts.......................................................................71 K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 Revision History........................................................................73 Preliminary Freescale Semiconductor, Inc. ...

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... Field Q Qualification status K## Kinetis family M Flash memory type K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K40 • Program flash only • Program flash and FlexMemory Table continues on the next page ...

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... MC = 121 MAPBGA ( mm) • 144 LQFP ( mm) • 144 MAPBGA ( mm) • 196 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 = 100 MHz • 120 = 120 MHz • 150 = 150 MHz • Tape and reel • (Blank) = Trays Preliminary Values Freescale Semiconductor, Inc. ...

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... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 Min. ...

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... Result of exceeding a rating Measured characteristic K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 8 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Max. Unit V Freescale Semiconductor, Inc. ...

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... Typical values are provided as design guidelines and are neither tested nor guaranteed. 3.8.1 Example 1 This is an example of an operating behavior that includes a typical value: K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Normal Limited operating operating range ...

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... Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 10 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

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... Description V Digital supply voltage DD I Digital supply current DD V Digital input voltage (except RESET, EXTAL, and XTAL) DIO K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –55 — — Min. — Min. -2000 -500 -100 Table continues on the next page... ...

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... V DD Table continues on the next page... Preliminary Min. Max. Unit –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — V — V 0.35 × 0.3 × — V Freescale Semiconductor, Inc. ...

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... V Bandgap voltage reference BG t Internal low power oscillator period LPO factory trimmed K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min 1.2 TBD , and induce an injection current when V SS supply LVD and POR operating requirements Min. ...

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... DD SS min and Vinput = and VLLSx→RUN recovery times in the following table Preliminary Typ. Max. Unit Notes 1.1 TBD V Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V 100 mA 1 μ μA 50 kΩ kΩ 3 Freescale Semiconductor, Inc. ...

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... VLPS → RUN 1. Normal boot (FTFL_OPT[LPBOOT]=1) 5.1.5 Power consumption operating behaviors Table 6. Power consumption operating behaviors Symbol Description I Analog supply current DDA K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. — DD — — — — — — ...

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... TBD — 1.25 TBD — TBD TBD — 1.05 TBD — 50 TBD — 12 TBD — 8 TBD — 6 TBD — 5 TBD — 4 TBD — 2 TBD — 550 TBD Preliminary Unit Notes μA μA μA μA μA μA μ Freescale Semiconductor, Inc. ...

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... No GPIOs toggled • Code execution from flash Figure 1. Run mode supply current vs. core frequency — all peripheral clocks disabled The following data was measured under these conditions: K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Preliminary General 17 ...

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... All peripheral clocks enabled but peripherals are not in active operation • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash Figure 2. Run mode supply current vs. core frequency — all peripheral clocks enabled K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 18 Preliminary Freescale Semiconductor, Inc. ...

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... Symbol Description C Input capacitance: analog pins IN_A C Input capacitance: digital pins IN_D 5.2 Switching specifications K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Frequency band (MHz) 0.15–50 50–150 150–500 500–1000 0.15–1000 = 96 MHz SYS Table 8. Capacitance attributes ...

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... Min. Max. 1.5 — 100 — 16 — TBD — 2 — — 12 — 36 — 32 — 36 Preliminary Unit Notes MHz MHz MHz MHz MHz MHz MHz MHz MHz Unit Notes Bus clock 1 cycles Bus clock cycles Freescale Semiconductor, Inc. ...

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... C =30pF loads, L • are configured for fast slew rate (PORTx_PCRn[SRE]=0), and • are configured for high drive strength (PORTx_PCRn[DSE]=1) K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. –40 –40 144 ...

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... Clock and data fall time f T Data setup s T Data hold h Figure 3. TRACE_CLKOUT specifications TRACE_CLKOUT TRACE_D[3:0] Figure 4. Trace data specifications K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 22 Min. Frequency dependent 2 2 — — Preliminary Max. Unit MHz — ns — — ns — Freescale Semiconductor, Inc. ...

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... TCLK frequency of operation • Boundary Scan • JTAG and CJTAG • Serial Wire Debug J2 TCLK cycle period K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table continues on the next page... Preliminary Min. Max. Unit 2 ...

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... TCLK (input) K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 Figure 5. Test clock input timing Preliminary Min. Max. Unit ns 50 — 25 — 12.5 — — — ns — — — ns 1.4 — ns — 22.1 ns — 22.1 ns 100 — — Freescale Semiconductor, Inc. ...

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... Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing TCLK TDI/TMS TDO TDO TDO K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing Preliminary ...

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... Table continues on the next page... Preliminary Max. Unit Notes — kHz — 39.0625 kHz — µA 4 µs ± 0 dco ± 0 dco ± 3 dco ± TBD %f 1 dco — 4 MHz — 5 MHz Freescale Semiconductor, Inc. ...

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... VDIV multiplier=48) pll_ref f PLL reference frequency range pll_ref J PLL period jitter cyc_pll J PLL accumulated jitter over 1µs window acc_pll K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — TBD — TBD (3/ ints_t (16/ ...

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... Table continues on the next page... Preliminary Max. Unit Notes ± 2.98 % ± 5. 1075( pll_ref Max. Unit Notes 3 — nA — μA — μA — μA — mA — mA Freescale Semiconductor, Inc. ...

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... See crystal or resonator manufacturer's recommendation can be provided by using either the integrated capacitors or by using external components When low power mode is selected, R K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — ...

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... TBD — 800 — 4 — 3 Min. 1.71 — — Table continues on the next page... Preliminary Max. Unit Notes 40 kHz 8 MHz 32 MHz 50 MHz — — ms — ms — ms Typ. Max. Unit — 3.6 V 100 — MΩ 2.5 — pF Freescale Semiconductor, Inc. ...

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... Sector Erase high-voltage time hversscr t Erase Block high-voltage time for 256 KB hversblk256k 1. Maximum time based on expectations at cycling end-of-life. K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 15 — 0.6 Min. ...

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... TBD TBD ms TBD TBD ms TBD TBD ms — 2.8 ms — 35 μs 50 TBD μs 320 1600 ms — 35 μs 175 TBD ms TBD TBD ms TBD TBD ms 100 TBD μs TBD TBD ms TBD 1.5 ms TBD TBD ms TBD 2.5 ms Freescale Semiconductor, Inc ...

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... Data retention after up to 100 cycles nvmretp100 n Cycling endurance nvmcycp t Data retention after cycles nvmretd10k K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 100 — TBD — TBD — ...

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... TBD — years TBD — cycles TBD — years TBD — years TBD — years TBD — writes TBD — writes TBD — writes TBD — writes TBD — writes ≤ 125°C. j × Write_efficiency × n nvmcycd Freescale Semiconductor, Inc ...

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... FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance nvmcycd Figure 9. EEPROM backup writes to FlexRAM K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Preliminary 35 ...

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... K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 36 EP3 EP2 EP4 EP9 EP7 EP8 EP5 EP6 Figure 10. EzPort Timing Diagram Preliminary Min. Max. Unit 2.7 3.6 V — MHz SYS — MHz SYS — ns EZP_CK 5 — — — — ns — — ns — Freescale Semiconductor, Inc. ...

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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 2.7 3.6 — ...

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... FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 38 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Freescale Semiconductor, Inc. ...

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... Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data ...

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... Table continues on the next page... Preliminary are achievable on the Table 26 and Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 5 12.0 MHz Freescale Semiconductor, Inc. ...

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... For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. ...

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... CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 — MHz ADACK f ADACK — MHz — MHz — MHz ±TBD ADC 4 LSB conversion ±1 clock <12MHz, Max hardware averaging (AVGE = %1, AVGS = %11) Freescale Semiconductor, Inc. ...

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... Avg=32 SFDR Spurious free 16 bit differential mode dynamic range • Avg=32 16 bit single-ended mode • Avg=32 K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ...

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... VREFOUT VREFOUT VREFOUT V — SSA V — SSA Table continues on the next page... Preliminary = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV/°C — mV Max. Unit Notes 3 DDA V V DDA Freescale Semiconductor, Inc. ...

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... PGAG=5 • PGAG=6 BW Input signal • 16-bit modes bandwidth • < 16-bit modes PSRR Power supply Gain=1 rejection ration K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. — 128 — 64 — 32 — ...

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... DDA to 3.6V TBD %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =500Hz in — dB 16-bit differential — dB mode, Average=32, f =500Hz in Freescale Semiconductor, Inc. ...

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... I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD 12.3 TBD 12.7 TBD 8.4 TBD 8 ...

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... V – 0.5 DD — 20 120 — 2 — –0.5 –0.3 -0.6V. DD Preliminary Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — TBD ns 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

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... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 00 ...

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... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

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... LP 1. Settling within ±1 LSB 2. The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV to V K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — ...

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... Peripheral operating requirements and behaviors 5. Calculated by a best fit curve from V Figure 18. Typical INL error vs. digital code K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 52 +100 mV to VREF−100 mV SS Preliminary Freescale Semiconductor, Inc. ...

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... Table 32. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page ...

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... Typ. Max. Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 20 — TBD ppm/year — TBD µA — 1.1 mA — TBD V — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. ...

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... Maximum load current — Standby mode LOADstby V Regulator output voltage — Input supply Reg33out (VREGIN) > 3.6 V • Run mode • Standby mode K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. TBD 0 14.25 0.25 Min ...

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... Min. Max. 1.71 3.6 — 12 — BCLK (t / SCK SCK/ — SCK (t / — SCK — — 15 — 0 — Preliminary Unit Notes V 1 μF mΩ Load Unit Notes V 1 MHz Freescale Semiconductor, Inc. ...

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... DSPI_SS inactive to DSPI_SOUT not driven DSPI_SS DSPI_SCK (CPOL=0) DSPI_SOUT DS13 DSPI_SIN Figure 23. DSPI classic SPI timing — slave mode K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS1 DS2 DS8 Data Last data First data DS5 ...

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... V — 25 MHz — ns BCLK (t /2) − / SCK SCK (t /2) − 2 — ns SCK (t /2) − 2 — ns SCK — 8.5 ns −2 — ns TBD — — ns DS4 Min. Max. Unit 2.7 3.6 V 12.5 MHz — ns BCLK (t /2) − SCK SCK Freescale Semiconductor, Inc. ...

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... C switching specifications See General switching specifications. 6.8.8 UART switching specifications See General switching specifications. K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 First data ...

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... K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 60 Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 26. SDHC timing Preliminary Min. Max. Unit 2.7 3 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — — 6 — — ns Freescale Semiconductor, Inc. ...

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... I2S_RXD/I2S_FS input hold after I2S_BCLK I2S_MCLK (output) I2S_BCLK (output I2S_FS (output) I2S_FS (input) S7 I2S_TXD I2S_RXD Figure 27. I K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors master (clocks driven) and slave 2 S master mode timing ...

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... Table continues on the next page... Preliminary Min. Max. Unit 2.7 3 — ns SYS 45% 55% MCLK period 10 — — ns — — — — ns S16 S14 S16 Typ. Max. Unit Notes — 3 500 pF 5.5 TBD MHz 0.5 TBD MHz Freescale Semiconductor, Inc. 1 ...

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... Glass V V — HREFSEL = 0 IREG IREG • HREFSEL = 0 • HREFSEL = 1 Δ V TRIM resolution RTRIM IREG K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD 1 TBD 600 TBD 1 TBD 1 — TBD — ...

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... V DD http://www.freescale.com and perform a keyword Then use this document number 98ASS23177W 98ASA00222D Preliminary Max. Unit Notes — µ — µA — µA — MΩ — MΩ — V — V — V — V Freescale Semiconductor, Inc. ...

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... PTE9 DISABLED 13 F1 PTE10 DISABLED 14 G4 PTE11 DISABLED 15 G3 PTE12 DISABLED K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 FB_AD27 PTE1 SPI1_SOUT UART1_RX SDHC0_D0 FB_AD26 PTE2 SPI1_SCK UART1_CT SDHC0_DC S_b ...

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... CMP1_IN2/ ADC0_SE2 ADC0_SE2 ADC0_SE2 VREF_OUT/ VREF_OUT VREF_OUT/ CMP1_IN5/ CMP1_IN5/ CMP0_IN5/ CMP0_IN5/ ADC1_SE1 ADC1_SE1 DAC0_OUT/ DAC0_OUT DAC0_OUT/ CMP1_IN3/ CMP1_IN3/ ADC0_SE2 ADC0_SE2 3 3 K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 66 ALT1 ALT2 ALT3 ALT4 Preliminary ALT5 ALT6 ALT7 EzPort Freescale Semiconductor, Inc. ...

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... K8 PTA8 ADC0_SE1 ADC0_SE1 PTA9 DISABLED 62 M9 PTA10 DISABLED 63 L9 PTA11 DISABLED K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE24 CAN1_TX UART4_TX PTE25 CAN1_RX UART4_RX PTE26 UART4_CT S_b PTE27 UART4_RT S_b PTE28 PTA0 UART0_CT ...

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... FB_BE23_1 6_BLS15_8 _b FB_CS4_b/ I2S0_TX_F FTM1_QD_ FB_TSIZ0/ S PHB FB_BE31_2 4_BLS7_0_ b FB_AD31 I2S0_TX_B CLK FB_AD30 I2S0_RXD FB_AD29 I2S0_RX_F S FB_AD28 I2S0_MCLK I2S0_CLKIN LPT0_ALT1 FB_AD14 FB_AD13 FB_AD12 FB_AD11 FB_AD10 FB_AD19 FTM1_QD_ LCD_P0 PHA FTM1_QD_ LCD_P1 PHB FTM0_FLT3 LCD_P2 FTM0_FLT0 LCD_P3 FTM1_FLT0 LCD_P4 Freescale Semiconductor, Inc. ...

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... ADC0_SE4 ADC0_SE4 b/ b/ CMP1_IN0/ CMP1_IN0/ TSI0_CH15 TSI0_CH15 106 A11 PTC3 LCD_P23/ LCD_P23/ CMP1_IN1 CMP1_IN1 K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTB5 PTB6 PTB7 PTB8 UART3_RT S_b PTB9 SPI1_PCS1 UART3_CT S_b PTB10 SPI1_PCS0 UART3_RX ...

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... PTD1 SPI0_SCK UART2_CT S_b PTD2 SPI0_SOUT UART2_RX PTD3 SPI0_SIN UART2_TX Preliminary ALT5 ALT6 ALT7 EzPort CMP1_OUT LCD_P24 CMP0_OUT LCD_P25 LCD_P26 LCD_P27 LCD_P28 FTM2_FLT0 LCD_P29 LCD_P30 LCD_P31 LCD_P32 LCD_P33 LCD_P34 LCD_P35 LCD_P36 LCD_P37 LCD_P38 LCD_P39 LCD_P40 LCD_P41 LCD_P42 LCD_P43 Freescale Semiconductor, Inc. ...

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... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ...

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... PTB20 99 PTB19 98 PTB18 97 PTB17 96 PTB16 95 94 VDD VSS 93 92 PTB11 PTB10 91 90 PTB9 PTB8 89 88 PTB7 PTB6 87 86 PTB5 PTB4 85 84 PTB3 PTB2 83 82 PTB1 PTB0 81 80 PTA29 PTA28 79 78 PTA27 PTA26 77 76 PTA25 PTA24 75 74 RESET_b PTA19 73 Freescale Semiconductor, Inc. ...

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... ADC0_DM3 ADC1_SE18 Figure 30. K40 144 MAPBGA Pinout Diagram 9 Revision History The following table provides a revision history for this document. Rev. No. Date 1 11/2010 K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc PTC8 PTD0 PTC16 PTC12 PTC19 PTC15 PTC11 PTC7 ...

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... Many updates throughout Added sections that were inadvertently removed in previous revision Reworded I footnote in "Voltage and Current Operating Requirements" IC table. Added paragraph to "Peripheral operating requirements and behaviors" section. Added "JTAG full voltage range electricals" table to the "JTAG electricals" section. Preliminary Freescale Semiconductor, Inc. ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...