PK60X256VMD100 Freescale Semiconductor, PK60X256VMD100 Datasheet

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PK60X256VMD100

Manufacturer Part Number
PK60X256VMD100
Description
IC ARM CORTEX MCU 256K 144-MAP
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Datasheets

Specifications of PK60X256VMD100

Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
Peripherals
DMA, I²S, LVD, POR, PWM, WDT
Number Of I /o
100
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 33x16b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Processor Series
Kinetis
Core
ARM Cortex M4
Data Ram Size
64 KB
Interface Type
UART, SPI, I2C, I2S, CAN
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
100
Operating Supply Voltage
1.71 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PK60X256VMD100
Manufacturer:
FSL
Quantity:
10
Part Number:
PK60X256VMD100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Data Sheet: Product Preview
K60 Sub-Family Data Sheet
Supports the following:
MK60N256VLQ100,
MK60X256VLQ100,
MK60N512VLQ100,
MK60N256VMD100,
MK60X256VMD100,
MK60N512VMD100
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
This document contains information on a product under development. Freescale
reserves the right to change or discontinue this product without notice.
© 2010–2011 Freescale Semiconductor, Inc.
Preliminary
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 100 MHz ARM Cortex-M4 core with DSP
– Up to 512 KB program flash memory on non-
– Up to 256 KB program flash memory on
– Up to 256 KB FlexNVM on FlexMemory devices
– 4 KB FlexRAM on FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– FlexBus external bus interface
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– 10 low-power modes to provide power optimization
– Memory protection unit with multi-master
– 16-channel DMA controller, supporting up to 64
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
instructions delivering 1.25 Dhrystone MIPS per
MHz
FlexMemory devices
FlexMemory devices
based on application requirements
protection
request sources
• Security and integrity modules
• Human-machine interface
• Analog modules
• Timers
– Hardware CRC module to support fast cyclic
– Hardware random-number generator
– Hardware encryption supporting DES, 3DES, AES,
– 128-bit unique identification (ID) number per chip
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
– Two 16-bit SAR ADCs
– Programmable gain amplifier (up to x64) integrated
– Two 12-bit DACs
– Three analog comparators (CMP) containing a 6-bit
– Voltage reference
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
– Two 2-channel quadrature decoder/general purpose
– IEEE 1588 timers
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
redundancy checks
MD5, SHA-1, and SHA-256 algorithms
into each ADC
DAC and programmable reference input
timer
timers
K60P144M100SF2
Document Number: K60P144M100SF2
Rev. 4, 3/2011

Related parts for PK60X256VMD100

PK60X256VMD100 Summary of contents

Page 1

... External watchdog monitor – Software watchdog – Low-leakage wakeup unit This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K60P144M100SF2 Rev. 4, 3/2011 K60P144M100SF2 • ...

Page 2

... USB full-/low-speed On-the-Go controller with on-chip transceiver – Two Controller Area Network (CAN) modules – Three SPI modules – Two I2C modules – Five UART modules – Secure Digital host controller (SDHC) – I2S module K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 2 Preliminary Freescale Semiconductor, Inc. ...

Page 3

... General switching specifications.........................20 5.3 Thermal specifications.......................................................21 5.3.1 Thermal operating requirements.........................21 5.3.2 Thermal attributes...............................................21 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Table of Contents 6 Peripheral operating requirements and behaviors....................21 6.1 Core modules....................................................................22 6.1.1 Debug trace timing specifications.......................22 6.1.2 JTAG electricals..................................................23 6 ...

Page 4

... K60 Signal Multiplexing and Pin Assignments..................65 8.2 K60 Pinouts.......................................................................72 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 Revision History........................................................................74 Preliminary Freescale Semiconductor, Inc. ...

Page 5

... Field Q Qualification status K## Kinetis family M Flash memory type K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K60 • Program flash only • Program flash and FlexMemory Table continues on the next page ...

Page 6

... MC = 121 MAPBGA ( mm) • 144 LQFP ( mm) • 144 MAPBGA ( mm) • 196 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 = 100 MHz • 120 = 120 MHz • 150 = 150 MHz • Tape and reel • (Blank) = Trays Preliminary Values Freescale Semiconductor, Inc. ...

Page 7

... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. 10 130 Min. ...

Page 8

... Result of exceeding a rating Measured characteristic K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 8 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Max. Unit V Freescale Semiconductor, Inc. ...

Page 9

... Typical values are provided as design guidelines and are neither tested nor guaranteed. 3.8.1 Example 1 This is an example of an operating behavior that includes a typical value: K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Normal Limited operating operating range ...

Page 10

... Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 10 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...

Page 11

... Description V Digital supply voltage DD I Digital supply current DD V Digital input voltage (except RESET, EXTAL, and XTAL) DIO K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. –55 — — Min. — Min. -2000 -500 -100 Table continues on the next page... ...

Page 12

... V DD Table continues on the next page... Preliminary Min. Max. Unit –0 0 – – –0.3 3.63 V –0.3 3.63 V –0.3 6.0 V –0.3 3.8 V Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — V — V 0.35 × 0.3 × — V Freescale Semiconductor, Inc. ...

Page 13

... V Bandgap voltage reference BG t Internal low power oscillator period LPO factory trimmed K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min 1.2 TBD , and induce an injection current when V SS supply LVD and POR operating requirements Min. ...

Page 14

... DD SS min and Vinput = and VLLSx→RUN recovery times in the following table Preliminary Typ. Max. Unit Notes 1.1 TBD V Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V 100 mA 1 μ μA 50 kΩ kΩ 3 Freescale Semiconductor, Inc. ...

Page 15

... VLPS → RUN 1. Normal boot (FTFL_OPT[LPBOOT]=1) 5.1.5 Power consumption operating behaviors Table 6. Power consumption operating behaviors Symbol Description I Analog supply current DDA K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. — DD — — — — — — ...

Page 16

... TBD — 0.4 TBD — 1.25 TBD — TBD TBD — 1.05 TBD — 50 TBD — 12 TBD — 8 TBD — 6 TBD — 4 TBD — 2 TBD — 550 TBD Preliminary Unit Notes μA μA μA μA μA μ Freescale Semiconductor, Inc. ...

Page 17

... No GPIOs toggled • Code execution from flash Figure 1. Run mode supply current vs. core frequency — all peripheral clocks disabled The following data was measured under these conditions: K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Preliminary General 17 ...

Page 18

... All peripheral clocks enabled but peripherals are not in active operation • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash Figure 2. Run mode supply current vs. core frequency — all peripheral clocks enabled K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 18 Preliminary Freescale Semiconductor, Inc. ...

Page 19

... Symbol Description C Input capacitance: analog pins IN_A C Input capacitance: digital pins IN_D 5.2 Switching specifications K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Frequency band (MHz) 0.15–50 50–150 150–500 500–1000 0.15–1000 = 96 MHz SYS Table 8. Capacitance attributes ...

Page 20

... C signals. Min. Max. 1.5 100 16 TBD 2 — — — — Preliminary Unit Notes MHz — MHz 50 MHz 50 MHz 25 MHz 2 MHz 2 MHz 2 MHz 1 MHz Unit Notes — Bus clock 1 cycles — — — — Bus clock cycles Freescale Semiconductor, Inc. ...

Page 21

... Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method Environmental Conditions—Forced Convection (Moving Air). 6 Peripheral operating requirements and behaviors All digital I/O switching characteristics assume: 1. output pins K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. –40 –40 144 ...

Page 22

... Clock and data fall time f T Data setup s T Data hold h Figure 3. TRACE_CLKOUT specifications TRACE_CLKOUT TRACE_D[3:0] Figure 4. Trace data specifications K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 22 Min. Frequency dependent 2 2 — — Preliminary Max. Unit MHz — ns — — ns — Freescale Semiconductor, Inc. ...

Page 23

... TCLK frequency of operation • Boundary Scan • JTAG and CJTAG • Serial Wire Debug J2 TCLK cycle period K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table continues on the next page... Preliminary Min. Max. Unit 2 ...

Page 24

... TCLK (input) K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 Figure 5. Test clock input timing Preliminary Min. Max. Unit ns 50 — 25 — 12.5 — — — ns — — — ns 1.4 — ns — 22.1 ns — 22.1 ns 100 — — Freescale Semiconductor, Inc. ...

Page 25

... Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing TCLK TDI/TMS TDO TDO TDO K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing Preliminary ...

Page 26

... Table continues on the next page... Preliminary Max. Unit Notes — kHz — 39.0625 kHz — µA 4 µs ± 0 dco ± 0 dco ± 3 dco ± TBD %f 1 dco — 4 MHz — 5 MHz Freescale Semiconductor, Inc. ...

Page 27

... VDIV multiplier=48) pll_ref f PLL reference frequency range pll_ref J PLL period jitter cyc_pll J PLL accumulated jitter over 1µs window acc_pll K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — TBD — TBD (3/ ints_t (16/ ...

Page 28

... Table continues on the next page... Preliminary Max. Unit Notes ± 2.98 % ± 5. 1075( pll_ref Max. Unit Notes 3 — nA — μA — μA — μA — mA — mA Freescale Semiconductor, Inc. ...

Page 29

... See crystal or resonator manufacturer's recommendation can be provided by using either the integrated capacitors or by using external components When low power mode is selected, R K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — — — — — ...

Page 30

... TBD — 800 — 4 — 3 Min. 1.71 — — Table continues on the next page... Preliminary Max. Unit Notes 40 kHz 8 MHz 32 MHz 50 MHz — — ms — ms — ms Typ. Max. Unit — 3.6 V 100 — MΩ 2.5 — pF Freescale Semiconductor, Inc. ...

Page 31

... Sector Erase high-voltage time hversscr t Erase Block high-voltage time for 256 KB hversblk256k 1. Maximum time based on expectations at cycling end-of-life. K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 15 — 0.6 Min. ...

Page 32

... TBD TBD ms TBD TBD ms TBD TBD ms — 2.8 ms — 35 μs 50 TBD μs 320 1600 ms — 35 μs 175 TBD ms TBD TBD ms TBD TBD ms 100 TBD μs TBD TBD ms TBD 1.5 ms TBD TBD ms TBD 2.5 ms Freescale Semiconductor, Inc ...

Page 33

... Data retention after up to 100 cycles nvmretp100 n Cycling endurance nvmcycp t Data retention after cycles nvmretd10k K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 100 — TBD — TBD — ...

Page 34

... TBD — years TBD — cycles TBD — years TBD — years TBD — years TBD — writes TBD — writes TBD — writes TBD — writes TBD — writes ≤ 125°C. j × Write_efficiency × n nvmcycd Freescale Semiconductor, Inc ...

Page 35

... FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance nvmcycd Figure 9. EEPROM backup writes to FlexRAM K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Preliminary 35 ...

Page 36

... K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 36 EP3 EP2 EP4 EP9 EP7 EP8 EP5 EP6 Figure 10. EzPort Timing Diagram Preliminary Min. Max. Unit 2.7 3.6 V — MHz SYS — MHz SYS — ns EZP_CK 5 — — — — ns — — ns — Freescale Semiconductor, Inc. ...

Page 37

... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 2.7 3.6 — ...

Page 38

... FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus read timing diagram K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 38 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Freescale Semiconductor, Inc. ...

Page 39

... Figure 12. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data ...

Page 40

... Table continues on the next page... Preliminary are achievable on the Table 26 and Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 5 12.0 MHz Freescale Semiconductor, Inc. ...

Page 41

... For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 7. For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. ...

Page 42

... CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 — MHz ADACK f ADACK — MHz — MHz — MHz ±TBD ADC 4 LSB conversion ±1 clock <12MHz, Max hardware averaging (AVGE = %1, AVGS = %11) Freescale Semiconductor, Inc. ...

Page 43

... Avg=32 SFDR Spurious free 16 bit differential mode dynamic range • Avg=32 16 bit single-ended mode • Avg=32 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ...

Page 44

... VREFOUT VREFOUT VREFOUT V — SSA V — SSA Table continues on the next page... Preliminary = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) — mV/°C — mV/°C — mV Max. Unit Notes 3 DDA V V DDA Freescale Semiconductor, Inc. ...

Page 45

... PGAG=5 • PGAG=6 BW Input signal • 16-bit modes bandwidth • < 16-bit modes PSRR Power supply Gain=1 rejection ration K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Typ. — 128 — 64 — 32 — ...

Page 46

... DDA to 3.6V TBD %/ leakage AS In current (refer to the MCU's voltage and current operating ratings × 0.583 — dB 16-bit differential — dB mode, Average=32 — dB 16-bit differential — dB mode, Average=32, f =500Hz in — dB 16-bit differential — dB mode, Average=32, f =500Hz in Freescale Semiconductor, Inc. ...

Page 47

... I Supply current, low-speed mode (EN=1, PMODE=0) DDLS V Analog input voltage AIN V Analog input offset voltage AIO K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD 12.3 TBD 12.7 TBD 8.4 TBD 8 ...

Page 48

... V – 0.5 DD — 20 120 — 2 — –0.5 –0.3 -0.6V. DD Preliminary Typ. Max. Unit 5 — — — — mV — — V — 0 200 ns 250 600 ns — TBD ns 7 — μA — 0.5 3 LSB — 0.3 LSB Freescale Semiconductor, Inc. ...

Page 49

... Figure 16. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 00 ...

Page 50

... A small load capacitance (47 pF) can improve the bandwidth performance of the DAC K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 −40 — — Preliminary HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 105 °C 100 Freescale Semiconductor, Inc. ...

Page 51

... LP 1. Settling within ±1 LSB 2. The INL is measured for 0+100mV The DNL is measured for 0+100 The DNL is measured for 0+100mV to V K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — ...

Page 52

... Peripheral operating requirements and behaviors 5. Calculated by a best fit curve from V Figure 18. Typical INL error vs. digital code K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 52 +100 mV to VREF−100 mV SS Preliminary Freescale Semiconductor, Inc. ...

Page 53

... Table 32. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page ...

Page 54

... Typ. Max. Unit Notes — TBD V — 1.202 V 0.5 — mV — See Figure 20 — TBD ppm/year — TBD µA — 1.1 mA — TBD V — 100 µs — TBD mV — TBD dB Max. Unit Notes 50 °C Max. Unit Notes TBD V Freescale Semiconductor, Inc. ...

Page 55

... TXCLK to TXD[3:0], TXEN, TXER invalid MII8 TXCLK to TXD[3:0], TXEN, TXER valid TXCLK (input) TXD[n:0] TXEN TXER Figure 22. MII transmit signal timing diagram K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — 35% 35 — ...

Page 56

... Universal Serial Bus Implementers Forum. For the most up-to-date standards, visit http://www.usb.org. K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 56 MII2 MII1 MII3 MII4 Valid data Valid data Valid data Min. — 35% 35 — Preliminary Max. Unit 50 MHz 65% RMII_CLK period 65% RMII_CLK period — ns — ns — Freescale Semiconductor, Inc. ...

Page 57

... External output capacitor equivalent series resistance I Current limitation threshold LIM 1. Operating in pass-through mode: regulator output voltage equal to the input voltage minus a drop proportional to I K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. TBD TBD 0.8 — ...

Page 58

... K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 58 Min. 1.71 — BCLK (t / SCK (t / SCK (t / SCK — DS1 DS2 DS8 Data Last data First data DS5 DS6 First data Data Last data Preliminary Max. Unit Notes 3 12.5 MHz — SCK/2) — ns — — ns — ns — ns DS4 Freescale Semiconductor, Inc. ...

Page 59

... Table 41. Master mode DSPI timing (high-speed mode) Num Operating voltage Frequency of operation K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data ...

Page 60

... SCK (t /2) − 2 — ns SCK (t /2) − 2 — ns SCK — 8.5 ns −2 — ns TBD — — ns DS4 Min. Max. Unit 2.7 3.6 V 12.5 MHz — ns BCLK (t /2) − SCK SCK — TBD ns 0 — — — ns — — Freescale Semiconductor, Inc. ...

Page 61

... Clock low time WL SD3 t Clock high time WH SD4 t Clock rise time TLH K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS10 DS15 DS12 First data Data DS14 First data Data Card input clock Table continues on the next page ...

Page 62

... K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. 62 (continued) SD3 SD2 SD1 SD6 SD7 SD8 Figure 28. SDHC timing master (clocks driven) and slave 2 S master mode timing Table continues on the next page... Preliminary Min. Max. Unit — 6 — — ns Min. Max. Unit 2.7 3 SYS Freescale Semiconductor, Inc. ...

Page 63

... I2S_FS input hold after I2S_BCLK S15 I2S_BCLK to I2S_TXD/I2S_FS output valid S16 I2S_BCLK to I2S_TXD/I2S_FS output invalid S17 I2S_RXD setup before I2S_BCLK K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 2 S master mode timing (continued ...

Page 64

... TBD — TBD — TBD Table continues on the next page... Preliminary Min. Max. Unit 2 — ns S16 S14 S16 Max. Unit Notes 3.6 V 500 pF 1 TBD MHz TBD MHz TBD pF TBD mV TBD μA 2 TBD μA 2 TBD % 3 TBD % 4 TBD % 5 Freescale Semiconductor, Inc. ...

Page 65

... If you want the drawing for this package 80-pin LQFP 81-pin MAPBGA 144-pin LQFP 144-pin MAPBGA 8 Pinout K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Min. Typ. 0.003 0.25 0.003 — — ...

Page 66

... S_b D PTE4 SPI1_PCS0 UART3_TX SDHC0_D3 PTE5 SPI1_PCS2 UART3_RX SDHC0_D2 PTE6 SPI1_PCS3 UART3_CT I2S0_MCLK S_b PTE7 UART3_RT I2S0_RXD S_b PTE8 I2S0_RX_F S PTE9 I2S0_RX_B CLK PTE10 I2S0_TXD PTE11 I2S0_TX_F S PTE12 I2S0_TX_B CLK Preliminary ALT5 ALT6 ALT7 EzPort I2C1_SDA I2C1_SCL I2S0_CLKIN Freescale Semiconductor, Inc. ...

Page 67

... CMP0_IN5/ ADC1_SE1 ADC1_SE1 DAC0_OUT/ DAC0_OUT DAC0_OUT/ CMP1_IN3/ CMP1_IN3/ ADC0_SE2 ADC0_SE2 DAC1_OUT/ DAC1_OUT DAC1_OUT/ CMP2_IN3/ CMP2_IN3/ ADC1_SE2 ADC1_SE2 XTAL32 XTAL32 XTAL32 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 Preliminary Pinout ALT5 ALT6 ALT7 EzPort 67 ...

Page 68

... EzPort EWM_OUT _b EWM_IN RTC_CLKO USB_CLKIN UT JTAG_TCL EZP_CLK K/ SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SW O JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_RX_B JTAG_TRS CLK T TRACE_CL KOUT TRACE_D3 FTM1_QD_ TRACE_D2 PHA FTM1_QD_ TRACE_D1 PHB FTM2_QD_ TRACE_D0 PHA FTM2_QD_ PHB I2S0_TXD FTM1_QD_ PHA Freescale Semiconductor, Inc. ...

Page 69

... G11 PTB3 / / ADC0_SE1 ADC0_SE1 3/TSI0_CH8 3/TSI0_CH8 85 G10 PTB4 / / ADC1_SE1 ADC1_SE1 0 0 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA13 CAN0_RX FTM1_CH1 RMII0_RXD 0/ MII0_RXD0 PTA14 SPI0_PCS0 UART0_TX RMII0_CRS _DV/ MII0_RXDV PTA15 SPI0_SCK UART0_RX RMII0_TXE ...

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... SPI0_PCS1 UART1_RX FTM0_CH2 Preliminary ALT5 ALT6 ALT7 EzPort FTM2_FLT0 FB_AD23 FB_AD22 FB_AD21 FB_AD20 FB_AD19 FTM0_FLT1 FB_AD18 FTM0_FLT2 FB_AD17 EWM_IN FB_AD16 EWM_OUT _b FB_AD15 FTM2_QD_ PHA FB_OE_b FTM2_QD_ PHB FB_AD31 CMP0_OUT FB_AD30 CMP1_OUT FB_AD29 CMP2_OUT FB_AD28 FB_AD14 FB_AD13 FB_AD12 FB_CLKOU T Freescale Semiconductor, Inc. ...

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... VDD VDD VDD 123 A6 PTC16 124 D5 PTC17 125 C5 PTC18 126 B5 PTC19 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTC4 SPI0_PCS0 UART1_TX FTM0_CH3 PTC5 SPI0_SCK LPT0_ALT2 FB_AD10 PTC6 SPI0_SOUT PDB0_EXT RG PTC7 SPI0_SIN PTC8 ...

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... PTD12 SPI2_SCK SDHC0_D4 PTD13 SPI2_SOUT SDHC0_D5 PTD14 SPI2_SIN SDHC0_D6 PTD15 SPI2_PCS1 SDHC0_D7 Preliminary ALT5 ALT6 ALT7 EzPort FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN FB_AD1 EWM_OUT _b FB_AD0 FTM0_FLT0 FTM0_FLT1 FB_A16 FB_A17 FB_A18 FB_A19 FB_A20 FB_A21 FB_A22 FB_A23 Freescale Semiconductor, Inc. ...

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... PGA1_DM/ADC1_DM0/ADC0_DM3 30 VDDA 31 VREFH 32 VREFL 33 VSSA 34 ADC1_SE16/CMP2_IN2/ADC0_SE22 35 ADC0_SE16/CMP1_IN2/ADC0_SE21 36 Figure 31. K60 144 LQFP Pinout Diagram K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Preliminary Pinout 108 VDD 107 VSS 106 PTC3 105 PTC2 104 PTC1 103 PTC0 102 PTB23 101 ...

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... PTB23 PTB22 D PTB21 PTB20 PTB19 PTB18 E PTB17 PTB16 PTB11 PTB10 F PTB9 PTB8 PTB7 PTB6 G PTB5 PTB4 PTB3 PTB2 H PTB1 PTB0 PTA29 PTA28 J PTA13 PTA27 PTA26 PTA25 K PTA12 PTA16 PTA17 PTA24 L PTA11 PTA14 PTA15 RESET_b M PTA10 VSS PTA19 PTA18 Freescale Semiconductor, Inc. ...

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... Date 2 3/2011 3 3/2011 4 3/2011 K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Substantial Changes Many updates throughout Corrected 81- and 104-pin package codes Added sections that were inadvertently removed in previous revision Reworded I footnote in "Voltage and Current Operating Requirements" IC table. ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...

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