STM32100B-EVAL STMicroelectronics, STM32100B-EVAL Datasheet - Page 8

MCU, MPU & DSP Development Tools STM32 ARM Value Line Eval Board

STM32100B-EVAL

Manufacturer Part Number
STM32100B-EVAL
Description
MCU, MPU & DSP Development Tools STM32 ARM Value Line Eval Board
Manufacturer
STMicroelectronics
Datasheets

Specifications of STM32100B-EVAL

Processor To Be Evaluated
STM32F100VB
Data Bus Width
32 bit
Interface Type
RS-232, USB, I2C, SPI, USART
Operating Supply Voltage
3.3 V
Silicon Manufacturer
ST Micro
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
STM32
Silicon Family Name
STM32F1xx
Kit Contents
Board
Features
IrDA Transceiver,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Hardware layout and configuration
2.2
Note:
8/41
Table 2.
Boot option
The STM32100B-EVAL board can boot from:
The boot option is configured by switches SW1 and SW2 as shown in
The hardware implementation of JP4 and the RS-232 interface can be only used when the
Boot0 is at a high level through the onboard switch SW2, which is not the most common
case of usage.
Table 3.
JP8
JP12
Switch
Jumper
SW1
SW2
JP4
Embedded user Flash
System memory with boot loader for ISP
Embedded SRAM for debugging
STM32100B-EVAL boots from user Flash when SW2 is set as
shown to the right (default setting).
In this configuration, the position of SW1 does not affect the boot
process.
STM32100B-EVAL boots from embedded SRAM when SW1 and
SW2 are set as shown to the right.
STM32100B-EVAL boots from system memory when SW1 and
SW2 are set as shown to the right.
BOOT0 pin of the STM32F100VBT6 is connected to the RS-232
connector CN10 pin 8 (CTS) for ISP support when JP4 is closed.
This configuration is used for boot loader application only.
Default setting: not fitted.
VDD power is directly connected to MCU VDD when JP8 is set as shown:
(Default setting)
Note: For manual IDD measurement JP8 must be removed and replaced by an ammeter
connected between JP8 pins 1 and 2.
Connect VDD power to MCU with current-sampling resistor, 1
for IDD current measurement when JP8 is set as shown:
(Available only on PCB rev B.) Connect IDD_CNT_EN (PE14) to Anti-tamper (PC13) for
IDD current measurement in standby mode when JP12 is closed.
Default setting: Not fitted
MCU power consumption measurement jumpers
Boot switches and jumper
Doc ID 16533 Rev 2
Boot from
Description
Ω
or 1K
Table
Switch configuration
Ω
, in series
3.
UM0841
1 2 3
1 2 3

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