WM8974GEFL/V Wolfson Microelectronics, WM8974GEFL/V Datasheet - Page 51

• Manufacturer Part Number: WM8974GEFL/V
• Description: Audio CODECs Mono Codec with Spkr
• Manufacturer: Wolfson Microelectronics

Specifications of WM8974GEFL/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-24
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
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Table 47 Audio Interface Control
Audio Interface Control
The register bits controlling audio format, word length and master / slave mode are summarised
below. Each audio interface can be controlled individually.
Register bit MS selects audio interface operation in master or slave mode. In Master mode BCLK,
and FRAME are outputs. The frequency of BCLK and FRAME in master mode are controlled with
BCLKDIV. These are divided down versions of master clock. This may result in short BCLK pulses
at the end of a frame if there is a non-integer ratio of BCLKs to FRAME clocks.
R4
Audio interface
control
REGISTER
ADDRESS
1
2
4:3
6:5
7
8
BIT
ADCLRSWAP
DACLRSWAP
FMT
WL
FRAMEP
BCP
LABEL
0
0
10
10
0
0
DEFAULT
Controls whether ADC data appears in ‘right’
or ‘left’ phases of FRAME clock:
0=ADC data appear in ‘left’ phase of FRAME
1=ADC data appears in ‘right’ phase of
FRAME
Controls whether DAC data appears in ‘right’
or ‘left’ phases of FRAME clock:
0=DAC data appear in ‘left’ phase of FRAME
1=DAC data appears in ‘right’ phase of
FRAME
Audio interface Data Format Select:
00=Right Justified
01=Left Justified
10=I
11= DSP/PCM mode
Word length
00=16 bits
01=20 bits
10=24 bits
11=32 bits (see note)
Frame clock polarity
0=normal
1=inverted
DSP Mode control
1 = Reserved
0 = Configures interface so that MSB is
available o
FRAME rising edge
BCLK polarity
0=normal
1=inverted
2
S format
n
2nd BCLK rising edge after
PD, Rev 4.5, September 2008
DESCRIPTION
WM8974
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