PIC18F6585-I/L Microchip Technology, PIC18F6585-I/L Datasheet - Page 330

• Manufacturer Part Number: PIC18F6585-I/L
• Description: Microcontrollers (MCU) 48KB 3328 RAM 52 I/O
• Manufacturer: Microchip Technology

Specifications of PIC18F6585-I/L

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/AUSART/CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 48 KB
• Package / Case: PLCC-68
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6585/8585/6680/8680
23.3
The PIC18F6585/8585/6680/8680 has six main modes
of operation:
• Configuration mode
• Disable mode
• Normal Operation mode
• Listen Only mode
• Loopback mode
• Error Recognition mode
All modes, except Error Recognition, are requested by
setting the REQOP bits (CANCON<7:5>); Error Recog-
nition is requested through the RXM bits of the Receive
Buffer register(s). Entry into a mode is Acknowledged
by monitoring the OPMODE bits.
When changing modes, the mode will not actually
change until all pending message transmissions are
complete. Because of this, the user must verify that the
device has actually changed into the requested mode
before further operations are executed.
23.3.1
The CAN module must be initialized before the
activation. This is only possible if the module is in the
Configuration mode. The Configuration mode is
requested by setting the REQOP2 bit. Only when the
status bit, OPMODE2, has a high level can the initial-
ization be performed. Once in Configuration mode,
registers such as baud rate control, acceptance mask/
filter and ECAN mode selection can be modified. A new
ECAN mode selection does not take into effect until
Configuration mode is exited. The module is activated
by setting the REQOP control bits to zero.
The module will protect the user from accidentally
violating the CAN protocol through programming
errors. All registers which control the configuration of
the module can not be modified while the module is
online. The CAN module will not be allowed to enter the
Configuration mode while a transmission or reception
is taking place. The CAN module will also not be
allowed, if the CANRX pin is low (i.e., the CAN bus is
busy). The CAN module waits for 11 recessive bits on
the CAN bus (bus Idle condition) before switching to
Configuration mode. The Configuration mode serves
as a lock to protect the following registers:
• Configuration registers
• Functional Mode Selection registers
• Bit Timing registers
• Identifier Acceptance Filter registers
• Identifier Acceptance Mask registers
• Filter and Mask Control registers
• Mask Selection registers
DS30491C-page 328
CAN Modes of Operation
CONFIGURATION MODE
In the Configuration mode, the module will not transmit
or receive. The error counters are cleared and the inter-
rupt flags remain unchanged. The programmer will
have access to configuration registers that are access
restricted in other modes.
23.3.2
In Disable mode, the module will not transmit or
receive. The module has the ability to set the WAKIF bit
due to bus activity; however, any pending interrupts will
remain and the error counters will retain their value.
If REQOP<2:0> is set to ‘001’, the module will enter the
Module Disable mode. This mode is similar to disabling
other peripheral modules by turning off the module
enables. This causes the module internal clock to stop
unless the module is active (i.e., receiving or transmit-
ting a message). If the module is active, the module will
wait for 11 recessive bits on the CAN bus, detect that
condition as an Idle bus, then accept the module
disable command. OPMODE<2:0> = 001 indicates
whether the module successfully went into Module
Disable mode.
The WAKIE interrupt is the only module interrupt that is
still active in the Module Disable mode. If wake-up from
CAN bus activity is required, the CAN module must be
put into Disable mode before putting the core to Sleep.
If the WAKDIS is cleared and WAKIE is set, the proces-
sor will receive an interrupt whenever the module
detects recessive to dominant transition. On wake-up,
the module will automatically be set to the previous
mode of operation. For example, if the module was
switched from Normal to Disable mode on bus activity
wake-up, the module will automatically enter into
Normal mode and the first message that caused the
module to wake-up is lost. The module will not gener-
ate any error frame. Firmware logic must detect this
condition and make sure that retransmission is
requested. If the processor receives a wake-up inter-
rupt while it is sleeping, more than one message may
get lost. The actual number of messages lost would
depend on the processor oscillator start-up time and
incoming message bit rate.
The I/O pins will revert to normal I/O function when the
module is in the Module Disable mode.
Note:
DISABLE MODE
CAN module must be put in Disable or
Configuration mode prior to putting the
processor to sleep. Failure to do that may
put the CAN module in indeterminate
state.
 2004 Microchip Technology Inc.