LCMXO640C-3TN100C Lattice, LCMXO640C-3TN100C Datasheet - Page 31

CPLD - Complex Programmable Logic Devices 640 LUTS 74 I/O

LCMXO640C-3TN100C

Manufacturer Part Number
LCMXO640C-3TN100C
Description
CPLD - Complex Programmable Logic Devices 640 LUTS 74 I/O
Manufacturer
Lattice
Series
MachXOr
Datasheet

Specifications of LCMXO640C-3TN100C

Memory Type
SRAM
Number Of Macrocells
320
Delay Time
4.9 ns
Number Of Programmable I/os
74
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Supply Current
17 mA
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-100
Mounting Style
SMD/SMT
Supply Voltage (max)
3.465 V
Supply Voltage (min)
1.71 V
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
4.9ns
Voltage Supply - Internal
1.71 V ~ 3.465 V
Number Of Logic Elements/blocks
-
Number Of Gates
-
Number Of I /o
74
Operating Temperature
0°C ~ 85°C
Mounting Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Lattice Semiconductor
Programming and Erase Flash Supply Current
I
I
I
1. For further information on supply current, please see details of additional technical documentation at the end of this data sheet.
2. Assumes all I/O pins are held at V
3. Typical user pattern.
4. JTAG programming is at 25MHz.
5. T
6. Per Bank. V
CC
CCAUX
CCIO
J
= 25°C, power supplies at nominal voltage.
Symbol
CCIO
= 2.5V. Does not include pull-up/pull-down.
Core Power Supply
Auxiliary Power Supply
V
Bank Power Supply
CCAUX
Parameter
CCIO
= 3.3V
or GND.
6
LCMXO256C
LCMXO640C
LCMXO1200C
LCMXO2280C
LCMXO256E
LCMXO640E
LCMXO1200E
LCMXO2280E
LCMXO256C/E
LCMXO640C/E
LCMXO1200/E
LCMXO2280C/E
All devices
Device
3-5
1, 2, 3, 4
DC and Switching Characteristics
Typ.
11
16
22
12
14
10
15
16
MachXO Family Data Sheet
9
6
8
8
2
5
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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