PCF2127AT/1,518 NXP Semiconductors, PCF2127AT/1,518 Datasheet - Page 39

• Manufacturer Part Number: PCF2127AT/1,518
• Description: IC RTC/CALENDAR TCXO QTZ 20SOIC
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2127AT/1,518

• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Time Format: HH:MM:SS (12/24 hr)
• Memory Size: 512B
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 4.2 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Serial Clock, Timestamp, Timekeeper, Watchdog, Alarm, Calendar, Timer, Timer Interrupt
• Rtc Memory Size: 512 bytes
• Supply Voltage (max): 4.2 V
• Supply Voltage (min): 1.8 V
• Mounting Style: SMD/SMT
• Rtc Bus Interface: I2C
• Supply Current: 2600 nA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PCF2127A_2
Product data sheet
8.11.5 Pre-defined timers: second and minute interrupt
8.11.6 Clearing flags
When the countdown timer flag CDTF is set, an interrupt signal on INT will be generated
provided that this mode is enabled. See
be controlled.
When starting the countdown timer for the first time, only the first period will not have a
fixed duration. The amount of inaccuracy for the first timer period will depend on the
chosen source clock, see
Table 38.
At the end of every countdown, the timer sets the countdown timer flag (CDTF). CDTF
may only be cleared by software. The asserted CDTF can be used to generate an
interrupt (INT). The interrupt may be generated as a pulsed signal every countdown
period or as a permanently active signal which follows the condition of CDTF. TI_TP is
used to control this mode selection. The interrupt output may be disabled with the CDTIE
bit, see
When reading the timer, the actual countdown value is returned and not the initial value n.
Since it is not possible to freeze the countdown timer counter during read back, it is
recommended to read the register twice and check for consistent results.
PCF2127A has two pre-defined timers which are used to generate an interrupt either once
per second or once per minute. The pulse generator for the minute or second interrupt
operates from an internal 64 Hz clock. It is independent of the watchdog or countdown
timers. Each of these timers can be enabled by the bits SI (second interrupt) and MI
(minute interrupt) in register Control_1.
The flags MSF, CDTF, AF and TSFx can be cleared by using the interface. To prevent one
flag being overwritten while clearing another, a logic AND is performed during the write
access. A flag is cleared by writing logic 0 whilst a flag is not cleared by writing logic1.
Writing logic1 will result in the flag value remaining unchanged.
Four examples are given for clearing the flags. Clearing the flags is made by a write
command:
Repeatedly re-writing these bits has no influence on the functional behavior.
Table 39.
Timer source clock
4.096 kHz
64 Hz
1 Hz
1
Register
Control_2
⁄
60
•
•
Hz
Bits labeled with - must be written with their previous values
WDTF is read only and has to be written with logic 0
Table
First period delay for timer counter
Flag location in register Control_2
6.
All information provided in this document is subject to legal disclaimers.
Bit
7
MSF
Rev. 02 — 7 May 2010
Table
6
WDTF
Minimum timer period
n
n
(n − 1) +
(n − 1) +
38.
5
TSF2
1
1
⁄
⁄
64
64
Section 8.13.2
Hz
Hz
4
AF
Integrated RTC, TCXO and quartz crystal
3
CDTF
for details on how the interrupt can
Maximum timer period
n + 1
n + 1
n +
n +
2
-
1
1
⁄
⁄
64
64
PCF2127A
Hz
Hz
© NXP B.V. 2010. All rights reserved.
1
-
0
-
39 of 80