MSC7118VF1200 Freescale Semiconductor, MSC7118VF1200 Datasheet - Page 47

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MSC7118VF1200

Manufacturer Part Number
MSC7118VF1200
Description
DSP 16BIT W/DDR CTRLR 400-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MSC711x StarCorer
Type
Fixed Pointr
Datasheet

Specifications of MSC7118VF1200

Interface
Host Interface, I²C, UART
Clock Rate
300MHz
Non-volatile Memory
ROM (8 kB)
On-chip Ram
464kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
400-MAPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MSC7118VF1200
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
3.2.7
One of the most common ways to derive power is to use either a simple fixed or adjustable linear regulator. For the system I/O
voltage supply, a simple fixed 3.3 V supply can be used. However, a separate adjustable linear regulator supply for the core
voltage V
requirements.
3.3
The following equations permit estimated power usage to be calculated for individual design conditions. Overall power is
derived by totaling the power used by each of the major subsystems:
This equation combines dynamic and static power. Dynamic power is determined using the generic equation:
3.3.1
Estimation of core power is straightforward. It uses the generic dynamic power equation and assumes that the core load
capacitance is 750 pF, core voltage swing is 1.2 V, and the core frequency is 300 MHz. This yields:
This equation allows for adjustments to voltage and frequency if necessary.
Freescale Semiconductor
Core
Memory
Reference
I/O
where,
DDC
Supply
Estimated Power Usage Calculations
Power Supply Design
Core Power
should be implemented. For the memory power supply, regulators are available that take care of all DDR power
C = load capacitance in pF
V = peak-to-peak voltage swing in V
F = frequency in MHz
MSC7118 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 7
P
TOTAL
P
CORE
Table 29. Recommended Power Supply Ratings
= P
= 750 pF × (1.2 V)
CORE
Symbol
V
V
V
V
+ P
DDIO
DDM
DDC
REF
C × V
PERIPHERALS
2
× F × 10
2
× 300 MHz × 10
+ P
–3
DDRIO
mW
Nominal Voltage
+ P
–3
1.25 V
1.2 V
2.5 V
3.3 V
IO
= 324.0 mW
+ P
LEAKAGE
Hardware Design Considerations
Current Rating
10 µA per device
1.5 A per device
0.5 A per device
1.0 A per device
Eqn. 3
Eqn. 4
Eqn. 5
47

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