ISL54226IRUZ-T7A Intersil, ISL54226IRUZ-T7A Datasheet
ISL54226IRUZ-T7A
Specifications of ISL54226IRUZ-T7A
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ISL54226IRUZ-T7A Summary of contents
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... HIGH-SPEED TRANSCEIVER D+ CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners 2.7V to 5.25V DD (see page 16) TIME SCALE (0.2ns/DIV) Copyright Intersil Americas Inc. 2010. All Rights Reserved ...
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Pin Configurations ISL54226 (8 LD 1.2x1.4 µTQFN) TOP VIEW OVP D- 1 LOGIC 4MΩ NOTE: 1. Switches Shown for OE/ALM = Logic “0”. Pin Descriptions PIN µTQFN TDFN NAME DESCRIPTION 4 1 INT Charger Mode Interrupt Output ...
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... Ordering Information PART NUMBER (Notes 2, 5) MARKING ISL54226IRUZ-T (Note 4) U5 ISL54226IRUZ-T7A (Note 4) U5 ISL54226IRTZ-T (Note 3) 226 ISL54226IRTZ-T7A (Note 3) 226 ISL54226IRZEVAL1Z Evaluation Board NOTES: 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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... Ld µTQFN Package (Notes 7, 9 TDFN Package (Notes 6, 8 Maximum Junction Temperature (Plastic Package). . Maximum Storage Temperature Range -65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Normal Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C V Supply Voltage Range . . . . . . . . . . . . . . 2.7V to 5.25V DD Logic Control Input Voltage ...
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Electrical Specifications - 2.7V to 5.25V Supply V = 0.5V, (Note 10), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, OE/ALML -40°C to +85°C. (Continued) PARAMETER Overvoltage Protection Detection Positive Fault-Protection Trip V = 2.7V to 5.25V, ...
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Electrical Specifications - 2.7V to 5.25V Supply V = 0.5V, (Note 10), Unless Otherwise Specified. Boldface limits apply over the operating temperature range, OE/ALML -40°C to +85°C. (Continued) PARAMETER Positive Supply Current 3.6V, OE/ALM = 1.4V DD ...
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Test Circuits and Waveforms Repeat test for all switches. COMx IMPEDANCE ANALYZER Dx GND Repeat test for all switches. FIGURE 3. CAPACITANCE TEST CIRCUIT 7 ISL54226 (Continued /17mA ON 1 COMx V HSDX V 1 17mA ...
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Test Circuits and Waveforms t ri 90% 50% 10% DIN+ t skew_i DIN- 90% 50% 10 90% 10% 50% OUT+ t skew_o OUT- 50% 90% 10 FIGURE 5A. MEASUREMENT POINTS Application Block Diagram VDD ...
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Detailed Description The ISL54226 device is a dual single pole/single throw (SPST) analog switch configured as a DPST that operates from a single DC power supply in the range of 2.7V to 5.25V. It was designed for switching a USB ...
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External V Series Resistor to Limit I DD Current during Negative OVP Condition A 100Ω to 1kΩ resistor in series with the VDD pin (see Figure 6) is required to limit the I from the system power supply rail during ...
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ISL54226 Operation The following will discuss using the ISL54226 shown in the “Application Block Diagram” on page 8. Power The power supply connected at the VDD pin provides the DC bias voltage required by the ISL54226 part for proper operation. ...
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Typical Performance Curves 3 17mA COM 2.7V 3.3 3.2 3.0V 3.3V 3.1 3.6V 4.3V 3.0 5.25V 2.9 0 0.1 0.2 V (V) COM FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE 4 2. ...
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Typical Performance Curves V = 3.3V DD FIGURE 15. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH 13 ISL54226 T = +25°C, Unless Otherwise Specified (Continued) A TIME SCALE (0.2ns/DIV) FN7614.0 July 29, 2010 ...
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Typical Performance Curves V = 3.3V DD FIGURE 16. EYE PATTERN: 12Mbps WITH USB SWITCHES IN THE SIGNAL PATH 0.0 -0 3.3V DD -1.0 -1.5 -2.0 -2 VOLTAGE (V) OH FIGURE 17 ...
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Typical Performance Curves 50Ω VIN = 0dBm, 0.86VDC BIAS 1M 10M FREQUENCY (Hz) FIGURE 19. FREQUENCY RESPONSE - 50Ω 0dBm, 0.2V BIAS IN DC -30 -40 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...
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Package Outline Drawing L8.2x2C 8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (TDFN) WITH E-PAD Rev 0, 07/08 2.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW Package Outline ( 6x0. 8x0.25 ) 0.80 2.00 TYPICAL RECOMMENDED ...
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Package Outline Drawing L8.1.4x1.2 8 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 4/09 1.40 PIN 1 INDEX AREA TOP VIEW 0.80 REF 8 X 0.20 0.60 0.70 TYPICAL RECOMMENDED LAND PATTERN 18 ISL54226 A B 0.60 0. ...