EL5420TISZ-T13 Intersil, EL5420TISZ-T13 Datasheet - Page 13

• Manufacturer Part Number: EL5420TISZ-T13
• Description: IC OPAMP GP RR 12MHZ QD 14SOIC
• Manufacturer: Intersil

Specifications of EL5420TISZ-T13

• Amplifier Type: Voltage Feedback
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• Slew Rate: 12 V/µs
• Gain Bandwidth Product: 8MHz
• -3db Bandwidth: 12MHz
• Current - Input Bias: 2nA
• Voltage - Input Offset: 4000µV
• Current - Supply: 500µA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 19 V, ±2.25 V ~ 9.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ON the outputs by putting them in a low impedance (normal)
operating state.
Driving Capacitive Loads
As load capacitance increases, the -3dB bandwidth will
decrease and peaking can occur. Depending on the
application, it may be necessary to reduce peaking and to
improve device stability. To improve device stability a
snubber circuit or a series resistor may be added to the
output of the EL5420T.
A snubber is a shunt load consisting of a resistor in series
with a capacitor. An optimized snubber can improve the
phase margin and the stability of the EL5420T. The
advantage of a snubber circuit is that it does not draw any
DC load current or reduce the gain.
Another method to reduce peaking is to add a series output
resistor (typically between 1Ω to 10Ω). Depending on the
capacitive loading, a small value resistor may be the most
appropriate choice to minimize any reduction in gain.
Power Dissipation
With the high-output drive capability of the EL5420T
amplifiers, it is possible to exceed the +150°C absolute
maximum junction temperature under certain load current
conditions. It is important to calculate the maximum power
dissipation of the EL5420T in the application. Proper load
conditions will ensure that the EL5420T junction temperature
stays within a safe operating region.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
P
where:
• T
• T
• Θ
• P
The total power dissipation produced by an IC is the total
quiescent supply current times the total power supply
voltage, plus the power dissipation in the IC due to the loads,
or:
P
when sourcing, and:
P
when sinking,
DMAX
DMAX
DMAX
AMAX
JMAX
DMAX
JA
= Thermal resistance of the package
=
=
=
= Maximum junction temperature
= Maximum ambient temperature
T
-------------------------------------------- -
Σi V
Σi V
= Maximum power dissipation allowed
JMAX
[
[
S
S
θ
×
×
–
JA
I
I
SMAX
SMAX
T
AMAX
+
+
(
(
V
V
S
OUT
13
+ V
–
i V
–
OUT
S
- )
i )
×
×
I
I
LOAD
LOAD
i
i
]
]
(EQ. 1)
(EQ. 3)
(EQ. 2)
EL5420T
where:
• i = 1 to 4
• V
• V
• V
• I
• V
• I
Device overheating can be avoided by calculating the
minimum resistive load condition, R
highest power dissipation. To find R
equations equal to each other and solve for V
Reference the package power dissipation curves, Figures 30
and 31, for further information.
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT
(1, 2, 3, 4 corresponds to Channel A, B, C, D respectively)
(I
SMAX
LOAD
S
S
S
SMAX
OUT
+ = Positive supply voltage
- = Negative supply voltage
= Total supply voltage (
= Output voltage
1.2
1.0
0.8
0.6
0.4
0.2
0.0
= Load current
= Maximum supply current per amplifier
= EL5420T quiescent current ÷ 4)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
962mW
833mW
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
1.04W
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
TEMPERATURE
0
TEMPERATURE
1.42W
2.66W
1.25W
25
25
Am bie nt Te m pe ra ture (°C)
Am b ie n t T e m p e ra tu re (°C)
θ
JA
50
50
SOIC14
= 120°C/W
θ
JA
V
QFN16
S
= 47°C/W
75
+ - V
75
85
LOAD
LOAD
θ
85
S
JA
θ
-
100
)
JA
QFN16
= 130°C/W
100
SOIC14
θ
= 88°C/W
, resulting in the
JA
set the two P
θ
TSSOP14
JA
= 150°C/W
TSSOP14
125
= 100°C/W
OUT
125
September 25, 2009
/I
LOAD
150
150
DMAX
FN6838.0
.