TW2802-FA Intersil, TW2802-FA Datasheet
TW2802-FA
Specifications of TW2802-FA
Related parts for TW2802-FA
TW2802-FA Summary of contents
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... TW2802/4 Multiple Video Decoder For Security Applications Preliminary Data Sheet from Techwell, Inc. Information may change without notice Disclaimer This document provides technical information for the user. Techwell Inc. reserves the right to modify the information in this document as necessary. The customer should make sure that they have the most recent data sheet version ...
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... TW2804/TW2802 Multiple Video Decoder Introduction and Features ______________3 Features ___________________________3 Applications _______________________3 Block Diagram _____________________4 Pin Diagram _______________________5 Pin Description _____________________5 Analog Interface Pins _______________5 Digital Data Interface Pins ___________6 System Control Pins ________________7 Power/Ground Pins_________________7 Functional Description _________________8 Video Input Formats ________________8 ...
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... TW2804/TW2802 Multiple Video Decoder Introduction and Features The TW280X includes four high quality NTSC/ PAL video decoders, which convert analog composite to digital component YCbCr for security application. The TW280X contains four 10-bit A/D and proprietary digital gain/clamp controllers and utilizes proprietary techniques for separating lumin- ance & ...
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... TW2804/TW2802 Multiple Video Decoder Block Diagram VIN1A MUX ADC VIN1B Motion Detector VIN2A MUX ADC VIN2B Motion Detector VIN3A MUX ADC VIN3B Motion Detector VIN4A MUX ADC VIN4B Motion Detector HSPB HCSB HALE Host Interface HRDB HWRH HDAT IRQ Techwell, Inc. ...
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... TW2804/TW2802 Multiple Video Decoder Pin Diagram 103 IRQ 104 HWRB 105 VDDO 106 HRDB 107 HALE 108 VSS 109 HCSB 110 HSPB 111 VDDAD 112 VDDA 113 VIN1A 114 VIN1B 115 VSSA 116 VSSA 117 VIN2A 118 VIN2B 119 VDDA Analog Pin ...
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... ACTIVE3* 52 ACTIVE4* 73 NVMD1 4 NVMD2 25 NVMD3* 46 NVMD4* 67 Notes: * Disabled for TW2802 Techwell, Inc. www.techwellinc.com Type Description O Dual scaled video data output for channel 1. O Dual scaled video data output for channel 2. O Dual scaled video data output for channel 3. O Dual scaled video data output for channel 4. ...
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... TW2804/TW2802 Multiple Video Decoder System Control Pins Name Number RSTB 2 CLK54I 89 CLK27O 88 TEST 1 HSPB 110 HCSB 109 HALE 107 HRDB 106 HWRB 104 91,92,94,95, HDAT [7:0] 97,98,100,101 IRQ 103 Power/Ground Pins Name Number 9,21,33,48,60, VDD 72,90,102 6,24,45, VDDO 66,84,105 3,12,15,18, 27, ...
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... TW2804/TW2802 Multiple Video Decoder Functional Description Video Input Formats The TW280X supports all NTSC/PAL standard formats and has built-in automatic standard detection circuit. The following Table 1 shows the identified standards. Automatic standard detection can be overridden by writing the value into the IFMTMAN and IFORMAT register (0x01, 0x41, 0x81, 0xC1) ...
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... TW2804/TW2802 Multiple Video Decoder Sync Processing The sync processor of TW280X detects horizontal synchronization and vertical synchronization signals in the composite. The TW280X utilizes proprietary technology for locking to weak, noisy, or unstable signals such as those from on air signal and fast forward or backward of VCR system. ...
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... TW2804/TW2802 Multiple Video Decoder Color Decoding Decimation Filter The digitized composite video data at 2X pixel clock rate first passes through decimation filter. The decimation filter is required to achieve optimum performance and prevent high frequency components from being aliased back into the video image. Fig 1 shows the characteristic of the decimation filter ...
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... TW2804/TW2802 Multiple Video Decoder Y/C Separation The adaptive comb filter is used for high quality luminance/chrominance separation from NTSC/PAL composite video signals. The comb filter improves the luminance resolution and reduces noise such as cross-luminance and cross-color. The adaptive algorithm eliminates most of errors without introducing new artifacts or noise. To accommodate some viewing preferences, additional chrominance trap filters are also available in the luminance path ...
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... TW2804/TW2802 Multiple Video Decoder Luminance Processing The luminance signal is separated by adaptive comb or trap filter is then fed to a peaking circuit. The peaking filter enhances the high frequency components of the luminance signal. Fig. 4 shows the characteristics of the peaking filter for four different gain modes. The picture contrast and brightness adjustment is provided through CONT (0x11, 0x51, 0x91, 0xD1) and BRT (0x12, 0x52, 0x92, 0xD2) registers ...
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... TW2804/TW2802 Multiple Video Decoder Chrominance Processing Chrominance Demodulation The chrominance demodulation is done by first quadrature mixing for NTSC and PAL. The mixing frequency is equal to the sub-carrier frequency of NTSC and PAL. After the mixing, a LPF is used to remove 2X carrier signal and yield chrominance components. The LPF characteristic can be selected for optimized transient color performance ...
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... TW2804/TW2802 Multiple Video Decoder 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 0 0.5 Fig. 6 The Characteristics of Chrominance Low Pass Filter ACC (Automatic Color gain control) The ACC (Automatic Color gain Control) compensates for reduced amplitudes caused by high frequency suppression in video signal. The range of ACC is from –6dB to 30dB approximately. ...
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... TW2804/TW2802 Multiple Video Decoder Video Scaling and Cropping The TW280X provides two methods to reduce the amount of video pixel data, scaling and cropping. The scaling function provides video image at lower resolution while the cropping function supplies only a portion of the video image. Video Scaling The TW280X includes a high quality horizontal and vertical down scaler ...
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... TW2804/TW2802 Multiple Video Decoder 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 0.5 Fig 8 The Characteristics of Group delay for horizontal luminance scaling 0 -5 -10 -15 -20 -25 -30 -35 -40 0 0.05 Fig. 9 The Characteristics of Anti-aliasing filter for vertical luminance scaling Techwell, Inc. ...
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... TW2804/TW2802 Multiple Video Decoder Down scaling is achieved by programming the horizontal scaling register (HSCALE) and vertical scaling register (VSCALE). When no scaled video image, the TW280X will output the number of pixels per line as specified by the HACTIVE register. If the number of output pixels required is smaller than the number specified by the HACTIVE register, the 16bit HSCALE register is used to reduce the output pixels to the desired number ...
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... TW2804/TW2802 Multiple Video Decoder Video Cropping The cropping function allows only subsection of a video image to be output. The active video region is determined by HDELAY, HACTIVE, VDELAY and VACTIVE register as illustrated in Fig 10. The first active line is defined by the VDELAY register and the first active pixel is defined by the HDELAY register ...
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... TW2804/TW2802 Multiple Video Decoder V reference HDELAY H reference V reference HDELAY H reference Fig 10 The Effect of Cropping and Scaling Active Registers Techwell, Inc. www.techwellinc.com HACTIVE Cropping and Scaling HACTIVE * HSCALE HACTIVE 19 Preliminary 09/09/2003 Datasheet Rev. 2.4 ...
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... TW2804/TW2802 Multiple Video Decoder Motion Detector The TW280X supports hardware motion detector for 4 channels individually. The motion detection algorithm built in the TW280X uses difference between two luminance levels of the adjacent two fields. Motion is detected for full screen image and each channel has 144(12x12) mask regions, which enable or disable motion detection for that region ...
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... TW2804/TW2802 Multiple Video Decoder Table 3 The recommended values of sensitivity parameters for a proper operation TMPSENS SPTSENS Velocity Control Motion has various velocities. That is fast motion an object appears and disappears rapidly between the adjacent fields while in a slow motion the contrary. As the built-in motion detection algorithm uses the luminance level difference between two adjacent fields, a slow motion is inferior in detection rate to a fast motion ...
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... TW2804/TW2802 Multiple Video Decoder Mask Detection Region The motion in the specific area can be ignored by the control of mask area. The full screen image is divided into 144 (12x12) mask areas. If the mask bit in specific area is programmed into high, the specific area is ignored in operation of motion detector, as illustrated in Fig. 11. ...
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... TW2804/TW2802 Multiple Video Decoder Output Format The TW280X supports three 8bit output formats, ITU-R BT.656, 8bit ITU-R BT.601 and Dual ITU-R BT.656 with 54MHz data format. The output data is synchronous with rising or falling edge of CLK27O for ITU-R BT.656 and 8bit ITU-R BT.601 format and with rising edge of CLK54I for Dual ITU-R BT ...
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... TW2804/TW2802 Multiple Video Decoder 8-bit ITU-R BT.601 Format 8-bit ITU-R BT.601 format is 8-bit YCbCr 4:2:2 data stream with additional timing information such as syncs and field flag. The video output timing is illustrated in Fig 13 and Fig 14. Analog Input Digital Output HS VS FLD Analog ...
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... TW2804/TW2802 Multiple Video Decoder FLD system cl o ck(54M the E ven 1760 system cl o ck(54M the E ven Fig 14 Horizontal and Vertical Timing in Video Output Dual ITU-R BT.656 Format in 54MHz Dual ITU-R BT.656 format in 54MHz is very useful to the security applications, which need two independently scaled video images for display and record purpose. In the case of HSCALE_X = 16’ ...
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... TW2804/TW2802 Multiple Video Decoder Host Interface The TW280X provides I2C serial and parallel interfaces that can be selected by HSPB pin. When HSPB is low, the parallel interface is selected, the serial interface for high. Some of the interface pins serve a dual purpose depending on the working mode. The pins HALE and HDAT[7] in parallel mode become SCLK and SDAT pins in serial mode respectively ...
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... TW2804/TW2802 Multiple Video Decoder Parallel Interface The following figures show the write/read timing chart of parallel interface. The parallel interface supports auto index increment after each byte of data is sent with WENB. Therefore, the host can write multiple bytes to the slave without additional address if they are in sequential order. ...
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... TW2804/TW2802 Multiple Video Decoder Interrupt Interface The TW280X provides the interrupt request function via an IRQ pin. Any video loss detection or motion detection will make the IRQ pin high until cleared via register IRQCLR (0x39) by the host. The host processor will read the interrupt status register DET_NVMD (0x38) to find out which channel has sensed motion or video loss ...
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... TW2804/TW2802 Multiple Video Decoder Control Register Register Map Address Mnemonic CH1 CH2 CH3 CH4 0x00 0x40 0x80 0xC0 VIDSTAT * 0x01 0x41 0x81 0xC1 FORMAT IFMTMAN 0x02 0x42 0x82 0xC2 AGC_PLL 0x03 0x43 0x83 0xC3 HDELAY_X 0x04 0x44 0x84 0xC4 HACTIVE_X 0x05 ...
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... TW2804/TW2802 Multiple Video Decoder Address Mnemonic CH1 CH2 CH3 CH4 0x27 0x67 0xA7 0xE7 MDMASK12 0x28 0x68 0xA8 0xE8 MDMASK2 0x29 0x69 0xA9 0xE9 MDMASK3 0x2A 0x6A 0xAA 0xEA MDMASK34 0x2B 0x6B 0xAB 0xEB MDMASK4 0x2C 0x6C 0xAC 0xEC MDMASK5 0x2D ...
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... TW2804/TW2802 Multiple Video Decoder Recommended Value Address Mnemonic CH1 CH2 CH3 CH4 0x00 0x40 0x80 0xC0 0x01 0x41 0x81 0xC1 0x02 0x42 0x82 0xC2 AGC_PLL 0x03 0x43 0x83 0xC3 HDELAY_X 0x04 0x44 0x84 0xC4 HACTIVE_X 0x05 0x45 0x85 0xC5 HDELAY_Y 0x06 ...
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... TW2804/TW2802 Multiple Video Decoder Address Mnemonic CH1 CH2 CH3 CH4 0x32 0x72 0xB2 0xF2 MDMSKL9 0x33 0x73 0xB3 0xF3 MDMSKM9A 0x34 0x74 0xB4 0xF4 MDMSKLA 0x35 0x75 0xB5 0xF5 MDMSKLB 0x36 0x76 0xB6 0xF6 MDMSKMBC 0x37 0x77 0xB7 0xF7 MDMSKLC 0x38 ...
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... TW2804/TW2802 Multiple Video Decoder Register Description CH Index [7] [6] 1 0x00 2 0x40 DET_FORMAT 3 0x80 4 0xC0 DET_FORMAT Status of video standard detection 0 PAL-B/D 1 PAL-M 2 PAL-N 3 PAL-60 4 NTSC-M 5 NTSC-4.43 6 NTSC-N DET_COLOR Status of color detection 0 Color is not detected 1 Color is detected LOCK_COLOR Status of locking for color demodulation loop ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x01 2 0x41 IFMTMAN 3 0x81 4 0xC1 Notes: * Read only register IFMTMAN Setting video standard manually with IFORMAT 0 Detect video standard automatically according to incoming video signal (default) 1 Video standard is selected with IFORMAT IFORMAT Force the device to operate in a particular video standard when IFMTMAN ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x02 2 0x42 AGC PEDEST 3 0x82 4 0xC2 AGC Enable the AGC 0 Disable the AGC (default) 1 Enable the AGC PEDEST Select the 7.5 IRE setup level, pedestal to black 0 No pedestal (default) 1 7.5 IRE setup level GNTIME Control the time constant of gain tracking loop ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x07 1 0x03 0x47 2 0x43 0x87 3 0x83 0xC7 4 0xC3 CH Index [7] [6] 0x07 1 0x05 0x47 2 0x45 0x87 3 0x85 0xC7 4 0xC5 HDELAY This 10-bit register defines the starting location of horizontal active pixel. A unit is 1 pixel. HDELAY1 and HDELAY2 define the different starting location of horizontal active pixel for dual scaler output ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x07 1 0x04 0x47 2 0x44 0x87 3 0x84 0xC7 4 0xC4 CH Index [7] [6] 0x07 HACTIVE[9:8] 1 0x06 0x47 HACTIVE[9:8] 2 0x46 0x87 HACTIVE[9:8] 3 0x86 0xC7 HACTIVE[9:8] 4 0xC6 HACTIVE This 10-bit register defines the number of horizontal active pixel. A unit is 1 pixel. HACTIVE1 and HACTIVE2 define the different number of horizontal active pixels for dual scaler output ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x0D 1 0x09 0x4D 2 0x49 0x8D 3 0x89 0xCD 4 0xC9 CH Index [7] [6] 0x0D 1 0x0B 0x4D 2 0x4B 0x8D 3 0x8B 0xCD 4 0xCB VDELAY This 9bit register defines the starting location of vertical active. A unit is 1 line. VDELAY1 and VDELAY2 define the different starting location of vertical active line for dual scaler output ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x0D 1 0x0A 0x4D 2 0x4A 0x8D 3 0x8A 0xCD 4 0xCA CH Index [7] [6] 0x0D 1 0x0C 0x4D 2 0x4C 0x8D 3 0x8C 0xCD 4 0xCC VACTIVE This 9bit register defines the number of vertical active lines. A unit is 1 line. VACTIVE1 and VACTIVE2 define the different number of vertical active lines for dual scaler output ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x0D 2 0x4D HPLLMAN 3 0x8D 4 0xCD HPLLMAN Set horizontal PLL time constant with HPLLTIME. 0 Automatic horizontal tracking mode (default) 1 Horizontal PLL time constant is fixed with HPLLTIME HPLLTIME Control the time constant of horizontal PLL when HPLLMAN is high ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x0E 2 0x4E FLDMODE 3 0x8E 4 0xCE FLDMODE Select the field flag generation mode 0 Field flag is detected from incoming video (default) 1 Field flag is generated from small accumulator of detected field 2 Field flag is generated from medium accumulator of detected field ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x0F 2 0x4F 3 0x8F 4 0xCF HUE Control the hue information. The resolution is 1.4° / LSB 128 : 255 CH Index [7] [6] 1 0x10 2 0x50 3 0x90 4 0xD0 SAT Control the color saturation. The resolution is 0.8% / LSB 128 : 255 Techwell, Inc. ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x11 2 0x51 3 0x91 4 0xD1 CONT Control the contrast. The resolution is 0.8% / LSB 128 : 255 CH Index [7] [6] 1 0x12 2 0x52 3 0x92 4 0xD2 BRT Control the brightness. The resolution is 0.2IRE / LSB 128 : 255 Techwell, Inc. www.techwellinc.com Contrast Control ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x13 2 0x53 IFCOMP 3 0x93 4 0xD3 IFCOMP Select the IF-compensation filter mode 0 No compensation (default dB/ MHz 2 +2 dB/ MHz 3 +3 dB/ MHz CLPF Select the Color LPF mode 0 550KHz bandwidth 1 750KHz bandwidth (default) 2 950KHz bandwidth 3 1.1MHz bandwidth ACCMODE ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x14 2 0x54 YPEAK_Y 3 0x94 4 0xD4 YPEAK_Y Control the luminance peaking for SCALER Y path 0 No peaking (default) 1 31.25% 2 62.5% 3 93.75% YPEAK_X Control the luminance peaking for SCALER X path 0 No peaking (default) 1 31.25% 2 62.5% 3 93.75% CKIL Control the color killing mode ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x15 2 0x55 VLPF_Y 3 0x95 4 0xD5 VLPF_Y Select the vertical anti-aliasing filter mode for VSCALER Y 0,1 Full bandwidth (default) 2 0.25 Line-rate bandwidth 3 0.18 Line-rate bandwidth VLPF_X Select the vertical anti-aliasing filter mode for VSCALER X 0,1 Full bandwidth (default ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x16 2 0x56 YBWI COMBMD 3 0x96 4 0xD6 CH Index [7] [6] 1 0x17 2 0x57 YBWI COMBMD 3 0x97 4 0xD7 YBWI Select the luminance trap filter mode 0 Narrow bandwidth trap filter mode (default) 1 Wide bandwidth trap filter mode COMBMD Select the adaptive comb filter mode ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x18 1 0x19 0x58 2 0x59 0x98 3 0x99 0xD8 4 0xD9 CH Index [7] [6] 0x1A 1 0x1B 0x5A 2 0x5B 0x9A 3 0x9B 0xDA 4 0xDB VSCALE The 16bit register defines a vertical scaling ratio. The actual vertical scaling ratio is VSCALE[15:0] / (2^16 – 1). VSCALE1 and VSCALE2 define the different vertical scaling ratio for dual scaler ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x1C 1 0x1D 0x5C 2 0x5D 0x9C 3 0x9D 0xDC 4 0xDD CH Index [7] [6] 0x1E 1 0x1F 0x5E 2 0x5F 0x9E 3 0x9F 0xDE 4 0xDF HSCALE The 16-bit register defines a horizontal scaling ratio. The actual horizontal scaling ratio is HSCALE[15:0] / (2^16 – 1). HSCALE1 and HSCALE2 define the different horizontal scaling ratio for dual scaler ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x20 2 0x60 0 VFLT_MD 3 0xA0 4 0xE0 CH Index [7] [6] 1 0x21 2 0x61 0 VFLT_MD 3 0xA1 4 0xE1 VFLT_MD Select the vertical scaling filter mode 0 Vertical poly-phase filter mode is selected (default) 1 Vertical bandwidth control mode is selected with VBW bits VBW Control the vertical bandwidth only if VFLT_MD bit is high ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x22 2 0x62 BGNDEN BGNDCLR NOVID_656 3 0xA2 4 0xE2 BGNDEN Control the background color on/off 0 Background color is disabled (default) 1 Background color is enabled BGNDCLR Select the background color mode only if BGNDEN bit is high 0 Blue color mode (default) 1 Black color mode ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x23 2 0x63 0xA3 4 0xE3 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register. Techwell, Inc. www.techwellinc.com Reserved [5] [4] [ Preliminary [2] [1] [ 09/09/2003 Datasheet Rev. 2.4 ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 1 0x24 2 0x64 LVLSENS 3 0xA4 4 0xE4 LVLSENS Control the level sensitivity of motion detector (default : 3) 0 More sensitive : 15 Less sensitive TMPSENS Control the temporal sensitivity of motion detector (default : 1) 0 More sensitive : 3 Less sensitive SPTSENS Control the spatial sensitivity of motion detector (default : 1) ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x27 1 0x26 0x67 2 0x66 0xA7 3 0xA6 0xE7 4 0xE6 CH Index [7] [6] 0x27 MDMASK2[11:8] 1 0x28 0x67 MDMASK2[11:8] 2 0x68 0xA7 MDMASK2[11:8] 3 0xA8 0xE7 MDMASK2[11:8] 4 0xE8 CH Index [7] [6] 0x2A 1 0x29 0x6A 2 0x69 0xAA 3 0xA9 0xEA 4 0xE9 Techwell, Inc. www.techwellinc.com ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x2A MDMASK4[11:8] 1 0x2B 0x6A MDMASK4[11:8] 2 0x6B 0xAA MDMASK4[11:8] 3 0xAB 0xEA MDMASK4[11:8] 4 0xEB CH Index [7] [6] 0x2D 1 0x2C 0x6D 2 0x6C 0xAD 3 0xAC 0xED 4 0xEC CH Index [7] [6] 0x2D MDMASK6[11:8] 1 0x2E 0x6D MDMASK6[11:8] 2 0x6E 0xAD MDMASK6[11:8] 3 0xAE 0xED MDMASK6[11:8] ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x30 1 0x2F 0x70 2 0x6F 0xB0 3 0xAF 0xF0 4 0xEF CH Index [7] [6] 0x30 MDMASK8[11:8] 1 0x31 0x70 MDMASK8[11:8] 2 0x71 0xB0 MDMASK8[11:8] 3 0xB1 0xF0 MDMASK8[11:8] 4 0xF1 CH Index [7] [6] 0x33 1 0x32 0x73 2 0x72 0xB3 3 0xB2 0xF3 4 0xF2 Techwell, Inc. www.techwellinc.com ...
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... TW2804/TW2802 Multiple Video Decoder CH Index [7] [6] 0x33 MDMASK10[11:8] 1 0x34 0x73 MDMASK10[11:8] 2 0x74 0xB3 MDMASK10[11:8] 3 0xB4 0xF3 MDMASK10[11:8] 4 0xF4 CH Index [7] [6] 0x36 1 0x35 0x76 2 0x75 0xB6 3 0xB5 0xF6 4 0xF5 CH Index [7] [6] 0x36 MDMASK12[11:8] 1 0x37 0x76 MDMASK12[11:8] 2 0x77 0xB6 MDMASK12[11:8] 3 0xB7 0xF6 MDMASK12[11:8] ...
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... TW2804/TW2802 Multiple Video Decoder No video and Motion Detection Flag (Read only) Index [7] [6] DET_ DET_ 0x38 NOVID4 NOVID3 DET_NOVID4 Status for detection of video loss in Channel 4 0 Video is alive 1 Video loss is detected DET_NOVID3 Status for detection of video loss in Channel 3 0 Video is alive ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] CLEAR_ CLEAR_ 0x39 NOVID4 NOVID3 IRQCLR Setting high to bits clears interrupt requests of corresponding bits. This bit is self-clearing in a few clocks after setting high (default : 0x00) Index [7] [6] EN_ EN _ 0x3A NOVID4 NOVID3 IRQENA Enable the corresponding (0x38, 0x39) interrupt register bit (default : 0x00) Techwell, Inc ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0x3B OE NVMD OE Control the tri-state of output pin 0 Outputs are Tri-state (default) 1 Outputs are enabled NVMD Select the output mode of NVMD pin 0 Video loss flag (default) 1 Motion detection flag ACTIVE_MODE Select the output mode of ACTIVE pin ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0x3C U_GAIN Adjust gain for U (or Cb) component. The resolution is 0.8% / LSB 128 100 % (default 255 200 % Index [7] [6] 0x3D V_GAIN Adjust gain for V (or Cr) component. The resolution is 0.8% / LSB 128 100 % (default 255 200 % Techwell, Inc. ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0x3E U_OFF U (or Cb) offset adjustment register. The resolution is 0.4% / LSB 128 0 % (default 255 50 % Index [7] [6] 0x3F V_OFF V (or Cr) offset adjustment register. The resolution is 0.4% / LSB 128 0 % (default) : 255 50 % Techwell, Inc. www.techwellinc.com U Offset [5] [4] [3] U_OFF[7:0] V Offset ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0x78 0 0 ADC_PWDN4 Power down the ADC of channel 4 0 Normal (default) 1 Power down ADC_PWDN3 Power down the ADC of channel 3 0 Normal (default) 1 Power down ADC_PWDN2 Power down the ADC of channel 2 0 Normal (default) 1 Power down ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0x79 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register. Index [7] [6] 0x7A 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] FLD_OFST FLD_OFST FLD_OFST 0x7B _4Y _4X FLD_OFST_4Y Remove the field offset between ODD and EVEN for Y path of Channel 4 0 Normal operation (default) 1 Remove the field offset between ODD and EVEN field FLD_OFST_4X Remove the field offset between ODD and EVEN for X path of Channel 4 ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0x7C 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register. Index [7] [6] 0x7D 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0xF8 HAV_VALID 0 HAV_VALID Select VALID output mode 0 Valid data indicator only for active data (default) 1 Valid data indicator for both active data and ITU-R 656 timing codes C_CORE Coring to reduce the noise in the chrominance 0 No coring ...
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... TW2804/TW2802 Multiple Video Decoder Chroma Delay and Comb Filter Correlation Reference Index [7] [6] 0xF9 0 CDEL Adjust the group delay of chrominance path relative to luminance 0 -2.0 pixel 1 -1.5 pixel 2 -1.0 pixel 3 -0.5 pixel 4 0.0 pixel (default) 5 0.5 pixel 6 1.0 pixel 7 1.5 pixel FLD_656 ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0xFA 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register. Index [7] [6] 0xFB 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register ...
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... TW2804/TW2802 Multiple Video Decoder Index [7] [6] 0xFC 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register. Index [7] [6] 0xFD 0 0 This control register is reserved for putting the part into test mode. For normal operation, the above value should be set in this register ...
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... TW2804/TW2802 Multiple Video Decoder Parametric Information DC Electrical Parameters Table 7 Absolute Maximum Ratings Parameter VDDA (measured to VSSA) VDD (measured to VSS) VDDO (measured to VSS) Voltage on any signal pin (See the note below) Analog Input Voltage Storage Temperature Junction Temperature Vapor Phase Soldering (15 Seconds) NOTE: Long-term exposure to absolute maximum ratings may affect device reliability, and permanent damage may occur if operate exceeding the rating ...
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... TW2804/TW2802 Multiple Video Decoder Parameter Digital Inputs Input High Voltage (TTL) Input Low Voltage (TTL) Input Leakage Current (@V =2.5V or 0V) I Input Capacitance Digital Outputs Output High Voltage Output Low Voltage High Level Output Current (@V =2.4V) OH Low Level Output Current (@V =0.4V) OL Tri-state Output Leakage Current (@V =2 ...
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... TW2804/TW2802 Multiple Video Decoder AC Electrical Parameters Table 11 Clock Timing Parameters Parameter Delay from CLK54I to CLK27O Hold from CLK27O to Data Delay from CLK27O to Data Hold from CLK54I to Data Delay from CLK54I to Data CLK54I CLK27O Data Output (27Mhz) Data Output (54Mhz) Techwell, Inc. ...
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... TW2804/TW2802 Multiple Video Decoder Table 12.Decoder Performance Parameter Parameter Horizontal PLL Line frequency (60Hz) Line frequency (50Hz) Permissible static deviation Subcarrier PLL Subcarrier frequency (NTSC-M) Subcarrier frequency (PAL-BDGHI) Subcarrier frequency (PAL-M) Subcarrier frequency (PAL-N) Lock in range AGC (Auto Gain Control) Range ...
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... TW2804/TW2802 Multiple Video Decoder Package Dimension Techwell, Inc. www.techwellinc.com 75 Datasheet Rev. 2.4 Preliminary 09/09/2003 ...
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... TW2804/TW2802 Multiple Video Decoder Techwell, Inc. www.techwellinc.com 76 Datasheet Rev. 2.4 Preliminary 09/09/2003 ...
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... TW2804/TW2802 Multiple Video Decoder Application Information Video Input Interface TW2804 has a built-in 2:1 input MUX for software controllable input selections. This MUX can be used to select two composite video sources. For a typical application, a video input requires an analog low-pass filter for alias reduction. An illustration is shown in the following application schematic ...
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... TW2804/TW2802 Multiple Video Decoder Application Schematic J100 R101 L100 RCA JACK CH1A 1 10uH 270 R100 C100 C101 R102 75 47pF 100pF 4.7k J101 RCA JACK R104 L101 CH2A 1 10uH 270 R103 C103 C104 R105 75 47pF 100pF 4.7k J102 RCA JACK R107 L102 ...
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... TW2804/TW2802 Multiple Video Decoder Revision History Table 13 Datasheet Revision History Revision Date 0.9 Oct / 01 / 2002 Engineering Release (1) Update Application Schematic (P.77) 1.0 Dec / 11 / 2002 (2) Update Recommended Value of Control Register Map (P.31~32) (1) Update Control Register Map (Read only description is added) 1.1 Jan / 29 / 2003 (P ...
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... TW2804/TW2802 Multiple Video Decoder Table 14. List of Revision Point in TW2804 RevC No. Issue Cross-talk between adjacent input 1 Cross-talk channels 100% amplitude, 2 100% saturation Clipping the yellow and cyan pattern Color bar pattern 3 Contrast range Biased toward upper range Background color 4 Not supported pattern ...