ISL3333EVAL1Z Intersil, ISL3333EVAL1Z Datasheet - Page 18

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ISL3333EVAL1Z

Manufacturer Part Number
ISL3333EVAL1Z
Description
EVAL BOARD 1 FOR ISL3333
Manufacturer
Intersil
Datasheets

Specifications of ISL3333EVAL1Z

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
All but 10uA of SHDN supply current (I
control input (ON, LB, SP, DE, DEN) pull-up resistors
(~11μA/resistor), so SHDN supply current varies depending
on the ISL333X configuration. The spec tables indicate the
SHDN currents for configurations that optimize these
currents. For example, in RS-232 mode the SP pins aren’t
used, so if both ports are configured for RS-232, floating or
tying the SP pins high minimizes SHDN current. Likewise in
RS-485 mode, the drivers are disabled in SHDN, so driving
the DE and DEN pins high during this time also reduces the
supply current.
When enabling from SHDN in RS-232 mode, allow at least
25μs for the charge pumps to stabilize before transmitting
data. The charge pumps aren’t used in RS-485 mode, so the
transceiver is ready to send or receive data in less than 2µs,
which is much faster than competing devices that require the
charge pump for all modes of operation.
Internal Loopback Mode
Driving the LB pin low places both ports in the loopback
mode, a mode that facilitates implementing board level self
test functions. In loopback, internal switches disconnect the
Rx inputs from the Rx outputs, and feed back the Tx outputs
to the appropriate Rx output. This way the data driven at the
Tx input appears at the corresponding Rx output (refer to
“Typical Operating Circuits” on page 6”). The Tx outputs
remain connected to their terminals, so the external loads
are reflected in the loopback performance. This allows the
loopback function to potentially detect some common bus
faults such as one or both driver outputs shorted to GND, or
outputs shorted together.
Note that the loopback mode uses an additional set of
receivers, as shown in the “Typical Operating Circuits”.
These loopback receivers are not standards compliant, so
the loopback mode can’t be used to implement a half-duplex
RS-485 transceiver.
If loopback won’t be utilized, the pin can be left disconnected
(thanks to the internal pull-up), or it should be connected to
V
ISL3333 (QFN Package) Special Features
Logic Supply (V
The ISL3333 (QFN) includes a V
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “logic” devices such as UARTs, ASICs,
and μcontrollers, and today most of these devices use power
supplies significantly lower than 3.3V. Thus, a 3.3V output
level from a 3.3V powered dual protocol IC might seriously
overdrive and damage the logic device input. Similarly, the
logic device’s low V
powered dual protocol input. Connecting the V
power supply of the logic device (Figure 12) limits the
ISL3333’s Rx output V
Tx and control input switching points to values compatible
CC
(V
L
for the QFN), through a 1kΩ resistor.
L
OH
Pin)
OH
might not exceed the V
to V
18
L
(Figure 15), and reduces the
L
pin that powers the logic
CC
plus I
IH
L
L
pin to the
) is due to
of a 3.3V
ISL3332, ISL3333
with the logic device output levels. Tailoring the logic pin
input switching points and output levels to the supply voltage
of the UART, ASIC, or μcontroller eliminates the need for a
level shifter/translator between the two ICs.
V
switching points may not provide enough noise margin when
V
various V
a particular V
Note: With V
data rate unless the logic signal V
the typical value listed in Table 5.
The V
the worst case configuration, as shown in Figures 20 and 21.
With the Rx outputs unloaded, all of the DC V
to inputs with internal pull-up resistors (DE, DEN, SP, LB,
L
L
can be anywhere from V
< 1.5V. Table 5 indicates typical V
FIGURE 12. USING V
L
supply current (I
TABLE 5. V
V
V
V
GND
GND
L
CC
CC
L
1.2
1.5
1.8
2.3
2.7
3.3
ISL3332
ISL3333
voltages so the user can ascertain whether or not
(V)
= +3.3V
= +3.3V
L
L
≤ 1.6V, the ISL3333 may not operate at the full
voltage meets his needs.
R
R
D
D
V
A
A
Y
L
Y
IH
V
AND V
V
V
OH
V
OH
L
IH
IH
L
) is typically less than 80μA, even in
= 3.3V
≥ 2
PIN TO ADJUST LOGIC LEVELS
= 1V
= 2V
CC
IL
V
V
V
OH
OH
vs. V
0.85
IH
0.9
0.9
1.2
1.4
1.8
down to 1.2V, but the input
≤ 2
≤ 2
(V)
IL
L
UART/PROCESSOR
UART/PROCESSOR
is at least 0.2V below
FOR V
IH
R
T
R
T
XD
XD
XD
XD
V
V
and V
CC
CC
= +2V
= +2V
CC
DIODE
DIODE
L
ESD
GND
ESD
GND
IL
= 3.3V
current is due
values for
V
0.26
0.73
IL
0.5
1.0
1.3
1.7
May 27, 2008
(V)
FN6362.0

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