DSPIC30F2010-30I/SPG Microchip Technology, DSPIC30F2010-30I/SPG Datasheet - Page 240

• Manufacturer Part Number: DSPIC30F2010-30I/SPG
• Description: 16BIT 30MIPS DSPIC, 30F2010, DIP28
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F2010-30I/SPG

• Core Frequency: 30MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Operating Temperature Range: -40°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC30F
Timing Specifications
U
UART
DS70082E-page 238
Watchdog Timer........................................................ 196
PLL Clock.................................................................. 193
Address Detect Mode ............................................... 125
Auto Baud Support.................................................... 126
Baud Rate Generator ................................................ 125
Enabling and Setting Up UART ................................ 123
Loopback Mode ........................................................ 125
Module Overview ...................................................... 121
Operation During CPU Sleep and Idle Modes .......... 126
Receiving Data.......................................................... 124
Alternate I/O...................................................... 123
Disabling ........................................................... 123
Enabling ............................................................ 123
Setting Up Data, Parity and Stop Bit
In 8-bit or 9-bit Data Mode ................................ 124
Interrupt............................................................. 124
Receive Buffer (UxRCB) ................................... 124
Selections ................................................. 123
Advance Information
Unit ID Locations .............................................................. 149
Universal Asynchronous Receiver Transmitter. See UART.
W
Wake-up from Sleep ......................................................... 149
Wake-up from Sleep and Idle ............................................. 53
Watchdog Timer
Watchdog Timer (WDT)............................................ 149, 159
WWW, On-Line Support ..................................................... 10
Reception Error Handling ......................................... 124
Transmitting Data ..................................................... 123
UART1 Register Map................................................ 127
UART2 Register Map................................................ 127
Timing Characteristics .............................................. 195
Timing Requirements................................................ 196
Enabling and Disabling ............................................. 159
Operation .................................................................. 159
Framing Error (FERR) ...................................... 125
Idle Status......................................................... 125
Parity Error (PERR) .......................................... 125
Receive Break .................................................. 125
Receive Buffer Overrun Error (OERR Bit) ........ 124
In 8-bit Data Mode ............................................ 123
In 9-bit Data Mode ............................................ 123
Interrupt ............................................................ 124
Transmit Buffer (UxTXB) .................................. 123
 2004 Microchip Technology Inc.