GS840Z36AGT-166 GSI TECHNOLOGY, GS840Z36AGT-166 Datasheet

GS840Z36AGT-166

Manufacturer Part Number

GS840Z36AGT-166

Description

IC, 4MB SYNCH NBT SRAM 1M X 36, 840

Manufacturer

GSI TECHNOLOGY

Datasheet

1.GS840Z36AGT-166.pdf (24 pages)

Specifications of GS840Z36AGT-166

Memory Size

4Mbit

Clock Frequency

166MHz

Access Time

8.5ns

Supply Voltage Range

2.3V To 2.7V, 3V To 3.6V

Memory Case Style

TQFP

No. Of Pins

100

Operating Temperature Range

0Â°C To +70Â°C

Memory Configuration

128K X 36

Rohs Compliant

Yes

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

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Part Number

Manufacturer

Quantity

Price

Company:

H&T Electronics

Part Number:

GS840Z36AGT-166

Quantity:

1 579

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100-Pin TQFP

Commercial Temp

Industrial Temp

Features

• 256K x 18 and 128K x 36 configurations

• User configurable Pipeline and Flow Through mode

• NBT (No Bus Turn Around) functionality allows zero wait

• Fully pin compatible with both pipelined and flow through

• Pin-compatible with 2M, 8M and 16M devices

• 3.3 V +10%/–5% core power supply

• 2.5 V or 3.3 V I/O supply

• LBO pin for Linear or Interleave Burst mode

• Byte write operation (9-bit Bytes)

• 3 chip enable signals for easy depth expansion

• Clock Control, registered address, data, and control

• ZZ Pin for automatic power-down

• JEDEC-standard 100-lead TQFP package

• Pb-Free 100-lead TQFP package available

Functional Description

The GS840Z18/36AT is a 4Mbit Synchronous Static SRAM.

GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other

pipelined read/double late write or flow through read/single

late write SRAMs, allow utilization of all available bus

bandwidth by eliminating the need to insert deselect cycles

when the device is switched from read to write cycles.

Rev: 1.03 11/2004

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

read-write-read bus utilization

NtRAM™, NoBL™ and ZBT™ SRAMs

Through

Pipeline

3-1-1-1

2-1-1-1

4Mb Pipelined and Flow Through

Flow

Synchronous NBT SRAMs

tCycle

Parameter Synopsis

335 mA

210 mA

1/24

5.5 ns

3.2 ns

9.1 ns

–180

8 ns

310 mA

190 mA

6.0 ns

3.5 ns

8.5 ns

Because it is a synchronous device, address, data inputs, and

read/ write control inputs are captured on the rising edge of the

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

sleep mode enable (ZZ) and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

The GS840Z18/36AT may be configured by the user to

operate in Pipeline or Flow Through mode. Operating as a

pipelined synchronous device, in addition to the rising-edge-

triggered registers that capture input signals, the device

incorporates a rising-edge-triggered output register. For read

cycles, pipelined SRAM output data is temporarily stored by

the edge triggered output register during the access cycle and

then released to the output drivers at the next rising edge of

clock.

The GS840Z18/36AT is implemented with GSI's high

performance CMOS technology and is available in a JEDEC-

standard 100-pin TQFP package.

10 ns

–166

280 mA

165 mA

6.6 ns

3.8 ns

10 ns

12 ns

–150

GS840Z18/36AT-180/166/150/100

190 mA

135 mA

4.5 ns

10 ns

12 ns

15 ns

–100

2.5 V and 3.3 V V

180 MHz–100 MHz

3.3 V V

DDQ

Related parts for GS840Z36AGT-166

GS840Z36AGT-166 Summary of contents

Page 1

... TQFP package. Parameter Synopsis –180 –166 –150 tCycle 5.5 ns 6 3.2 ns 3 335 mA 310 mA 280 8 tCycle 9 210 mA 190 mA 165 mA DD 1/24 GS840Z18/36AT-180/166/150/100 180 MHz–100 MHz 3 2.5 V and 3 –100 10 ns 4.5 ns 190 135 mA © 2001, GSI Technology DD DDQ ...

Page 2

... DDQ DDQ DDQ DQP DDQ Rev: 1.03 11/2004 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS840Z18AT Pinout (Package T) 256K x 18 Top View 2/24 GS840Z18/36AT-180/166/150/100 DDQ DQP DDQ DDQ DDQ © 2001, GSI Technology ...

Page 3

... DQP DDQ DDQ DDQ DDQ DQP Rev: 1.03 11/2004 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS840Z36AT Pinout (Package T) 128K x 36 Top View 3/24 GS840Z18/36AT-180/166/150/100 DQP DDQ DDQ DDQ DDQ © 2001, GSI Technology ...

Page 4

... Power down control; active high Pipeline/Flow Through Mode Control; active low Linear Burst Order; active low 3.3 V power supply Ground 3.3 V output power supply for noise reduction No Connect 4/24 ; active low A9 ; active low B9 ; active low C9 ; active low D9 © 2001, GSI Technology ...

Page 5

... GS840Z18/36A NBT SRAM Functional Block Diagram Rev: 1.03 11/2004 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS840Z18/36AT-180/166/150/100 Amps Sense Drivers Write 5/24 © 2001, GSI Technology ...

Page 6

... Rev: 1.03 11/2004 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com and B ) determine which bytes will be written. All or none may be activated. A write cycle D 6/24 GS840Z18/36AT-180/166/150/100 , E and E ). Deassertion of any one of the Enable © 2001, GSI Technology ...

Page 7

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. External L Next L External L Next L External L Next L Next L None L None L None L None L None L None Current L 7/24 GS840Z18/36AT-180/166/150/100 High High High-Z 1,2,3, High High High High High High © 2001, GSI Technology Notes 1,10 2 1,2,10 3 1,3, ...

Page 8

... and D represent input command codes as indicated in the Synchronous Truth Table. n+1 n+2 ƒ ƒ Next State Pipelined and Flow Through Read/Write Control State Diagram 8/24 GS840Z18/36AT-180/166/150/100 New Write Burst Write B D n+3 ƒ ƒ © 2001, GSI Technology ...

Page 9

... and D represent input command codes as indicated in the Truth Tables. Next State (n+2) n n+1 n+2 ƒ ƒ Intermediate Current State State Pipeline Mode Data I/O State Diagram 9/24 GS840Z18/36AT-180/166/150/100 Intermediate R B Data Out W (Q Valid) D n+3 ƒ ƒ Next State © 2001, GSI Technology ...

Page 10

... Next State (n+1) n+1 n+2 ƒ ƒ Next State Pipelined and Flow Through Read Write Control State Diagram 10/24 GS840Z18/36AT-180/166/150/100 R B Data Out W (Q Valid) D shown because it prevents any state change. codes as indicated in the Truth Tables. n+3 ƒ ƒ © 2001, GSI Technology ...

Page 11

... Note: The burst counter wraps to initial state on the 5th clock. 11/24 GS840Z18/36AT-180/166/150/100 Function Linear Burst Interleaved Burst Active Standby A[1:0] A[1:0] A[1:0] A[1: BPR 1999.05.18 © 2001, GSI Technology ...

Page 12

... Rev: 1.03 11/2004 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Sleep Mode Timing Diagram tKH tKH tKL tKL tZZS tZZH DD 12/24 GS840Z18/36AT-180/166/150/100 2. The duration of SB tZZR pipelined parts and V on flow DDQ DDQ © 2001, GSI Technology on ...

Page 13

... GS840Z18/36AT-180/166/150/100 Value –0.5 to 4.6 –0.5 to 4.6 –0 +0.5 (≤ 4.6 V max.) DDQ –0 +0.5 (≤ 4.6 V max.) DD +/–20 +/–20 1.5 –55 to 125 –55 to 125 Typ. Max. Unit 3.3 3.6 V 2.5 2.7 V 3.3 3.6 V 2.5 2.7 V © 2001, GSI Technology Unit Notes ...

Page 14

... V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC. DDn 14/24 Max. Unit Notes 0.3 V 1,3 DDQ 0.8 V 1,3 Max. Unit Notes 0.3 0.3 V 1,3 DDQ 0.3*V V 1,3 DD Max. Unit Notes ° ° © 2001, GSI Technology ...

Page 15

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Overshoot Measurement and Timing 50% V Symbol Test conditions I/O OUT Conditions V – DDQ Fig. 1 Output Load 1 DQ 50Ω V DDQ/2 * Distributed Test Jig Capacitance 15/24 GS840Z18/36AT-180/166/150/100 50% tKC Typ. Max. Unit 30pF © 2001, GSI Technology ...

Page 16

... IN I Output Disable OUT –8 mA, V OH2 OH DDQ –8 mA, V OH3 OH DDQ 16/24 GS840Z18/36AT-180/166/150/100 Min – ≥ V – ≤ V –1 uA 100 uA IH ≥ V –100 uA IL ≤ V – – 2.375 V 1 3.135 V 2.4 V — © 2001, GSI Technology Max — — 0.4 V ...

Page 17

... Pipeline I DD 210 220 190 Flow-Thru Pipeline Flow-Thru Pipeline Flow-Thru 17/24 GS840Z18/36AT-180/166/150/100 150 100 - - – – –40 to 85°C 70°C 85°C 70°C 85°C 320 280 290 190 200 200 165 175 135 145 © 2001, GSI Technology Unit ...

Page 18

... GSI Technology Unit ...

Page 19

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Pipeline Mode Timing Suspend Read C Write D writeno-op tKH tKH tKC tKC tKL tKL D(A) Q(B) Q(C) 19/24 GS840Z18/36AT-180/166/150/100 Read E Deselect E tLZ tHZ tKQ tKQX D(D) Q(E) © 2001, GSI Technology ...

Page 20

... Flow Through Mode Timing Write B+1 Read C Cont tKL tKL tKH tKH tKC tKC C D tKQ tLZ D(B) D(B+1) Q(C) tOHZ 20/24 GS840Z18/36AT-180/166/150/100 Read D Write E Read F Write tKQ tKQX tHZ tLZ Q(D) D(E) Q(F) tOLZ tOE © 2001, GSI Technology tKQX D(G) ...

Page 21

... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. θ 0.10 0.15 1.40 1.45 0.30 0.40 0.20 — e 22.0 22.1 20.0 20.1 16.0 16.1 b 14.0 14.1 0.65 — 0.60 0.75 1.00 — 0.10 — 7° 21/24 GS840Z18/36AT-180/166/150/100 E1 E BPR 1999.05.18 © 2001, GSI Technology ...

Page 22

... GS840Z18AGT-100 128K x 36 GS840Z36AGT-180 128K x 36 GS840Z36AGT-166 Notes: 1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. Example: GS8Z36A-100IT. 2. The speed column indicates the cycle frequency (MHz) of the device in Pipeline mode and the latency (ns) in Flow Through mode. Each device is Pipeline/Flow Through mode-selectable by the user ...

Page 23

... GS840Z18AGT-166I 256K x 18 GS840Z18AGT-150I 256K x 18 GS840Z18AGT-100I 128K x 36 GS840Z36AGT-180I 128K x 36 GS840Z36AGT-166I 128K x 36 GS840Z36AGT-150I 128K x 36 GS840Z36AGT-100I Notes: 1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. Example: GS8Z36A-100IT. 2. ...

Page 24

... Content Currents table • Removed 200 MHz speed bin from entire document Content • Removed pin locations from pin description table • Updated format Format/Content • Updated timing diagrams • Added Pb-free information for TQFP 24/24 GS840Z18/36AT-180/166/150/100 © 2001, GSI Technology ...

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