PIC24FJ256GA106-I/MR Microchip Technology, PIC24FJ256GA106-I/MR Datasheet - Page 51

• Manufacturer Part Number: PIC24FJ256GA106-I/MR
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GA106-I/MR

• Controller Family/series: PIC24
• No. Of I/o's: 53
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Core Size: 16 Bit
• Program Memory Size: 256KB
• Peripherals: ADC, Comparator, PWM, RTC, Timer
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

5.4
5.4.1
If it is determined that the programming executive is
not present in executive memory (as described
in
Programming
into executive memory using ICSP, as described in
Section 3.0 “Device Programming –
TABLE 5-5:
 2010 Microchip Technology Inc.
Step 1: Exit Reset vector and erase executive memory.
Step 2: Initialize the NVMCON to erase executive memory.
Step 3: Initialize Erase Pointers to first page of executive and then initiate the erase cycle.
Step 4: Repeat this step to poll the WR bit (bit 15 of NVMCON) until it is cleared by the hardware.
Step 5: Repeat Steps 3 and 4 to erase the second page of executive memory. The W1 Pointer should be
Step 6: Initialize the NVMCON to program 64 instruction words.
Step 7: Initialize TBLPAG and the Write Pointer (W7).
Command
Section 4.2 “Confirming the Presence of the
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0000
0000
0000
Programming the Programming
Executive to Memory
incremented by 400h to point to the second page.
OVERVIEW
Executive”), it must be programmed
PROGRAMMING THE PROGRAMMING EXECUTIVE
000000
040200
000000
240420
883B00
200800
8802A0
200001
000000
BB0881
000000
000000
A8E761
000000
000000
040200
000000
803B02
883C22
000000
<VISI>
000000
240010
883B00
200800
8802A0
EB0380
000000
(Hex)
Data
NOP
GOTO
NOP
MOV
MOV
MOV
MOV
MOV
NOP
TBLWTL
NOP
NOP
BSET
NOP
NOP
GOTO
NOP
MOV
MOV
NOP
Clock out contents of the VISI register.
NOP
MOV
MOV
MOV
MOV
CLR
NOP
PIC24FJXXXDA1/DA2/GB2/GA3
ICSP”.
#0x4001, W0
W0, NVMCON
#0x80, W0
W0, TBLPAG
W7
0x200
#0x4042, W0
W0, NVMCON
#0x80, W0
W0, TBLPAG
#0x0, W1
W1, [W1]
NVMCON, #15
0x200
NVMCON, W2
W2, VISI
Storing the programming executive to executive
memory is similar to normal programming of code
memory. Namely, the executive memory must be
erased and then the programming executive must be
programmed, 64 words at a time.
this control flow.
Note:
Description
The programming executive must always
be erased before it is programmed, as
described in
Table
5-5.
Table 5-5
DS39970B-page 51
provides