COP8SGR728M8 National Semiconductor, COP8SGR728M8 Datasheet - Page 49

• Manufacturer Part Number: COP8SGR728M8
• Description: 8-Bit Microcontroller IC
• Manufacturer: National Semiconductor
• Series: COP8r

Specifications of COP8SGR728M8

• Controller Family/series: COP8
• Core Size: 8 Bit
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Package: 28SOIC W
• Family Name: COP8
• Maximum Speed: 15 MHz
• Ram Size: 512 Byte
• Program Memory Size: 32 KB
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 40
• Interface Type: USART
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

14.0 Instruction Set
The VIS instruction is a special case of the Indirect Transfer
of Control addressing mode, where the double-byte vector
associated with the interrupt is transferred from adjacent
addresses in program memory into the Program Counter in
order to jump to the associated interrupt service routine.
14.4 INSTRUCTION TYPES
The instruction set contains a wide variety of instructions.
The available instructions are listed below, organized into
related groups.
Some instructions test a condition and skip the next instruc-
tion if the condition is not true. Skipped instructions are
executed as no-operation (NOP) instructions.
14.4.1 Arithmetic Instructions
The arithmetic instructions perform binary arithmetic such as
addition and subtraction, with or without the Carry bit.
14.4.2 Transfer-of-Control Instructions
The transfer-of-control instructions change the usual se-
quential program flow by altering the contents of the Pro-
gram Counter. The Jump to Subroutine instructions save the
Program Counter contents on the stack before jumping; the
Return instructions pop the top of the stack back into the
Program Counter.
Add (ADD)
Add with Carry (ADC)
Subtract (SUB)
Subtract with Carry (SUBC)
Increment (INC)
Decrement (DEC)
Decimal Correct (DCOR)
Clear Accumulator (CLR)
Set Carry (SC)
Reset Carry (RC)
Jump Relative (JP)
Jump Absolute (JMP)
Jump Absolute Long (JMPL)
Jump Indirect (JID)
Jump to Subroutine (JSR)
Jump to Subroutine Long (JSRL)
Return from Subroutine (RET)
Return from Subroutine and Skip (RETSK)
Return from Interrupt (RETI)
Software Trap Interrupt (INTR)
Vector Interrupt Select (VIS)
0126 Hex
Memory
Location
Reg/
Contents
32 Hex
Before
(Continued)
Contents
32 Hex
After
49
14.4.3 Load and Exchange Instructions
The load and exchange instructions write byte values in
registers or memory. The addressing mode determines the
source of the data.
14.4.4 Logical Instructions
The logical instructions perform the operations AND, OR,
and XOR (Exclusive OR). Other logical operations can be
performed by combining these basic operations. For ex-
ample, complementing is accomplished by exclusiveORing
the Accumulator with FF Hex.
14.4.5 Accumulator Bit Manipulation Instructions
The Accumulator bit manipulation instructions allow the user
to shift the Accumulator bits and to swap its two nibbles.
14.4.6 Stack Control Instructions
14.4.7 Memory Bit Manipulation Instructions
set and reset individual bits in memory.
14.4.8 Conditional Instructions
The conditional instruction test a condition. If the condition is
true, the next instruction is executed in the normal manner; if
the condition is false, the next instruction is skipped.
14.4.9 No-Operation Instruction
The no-operation instruction does nothing, except to occupy
space in the program memory and time in execution.
Note: The VIS is a special case of the Indirect Transfer of Control addressing
Load (LD)
Load Accumulator Indirect (LAID)
Exchange (X)
Logical AND (AND)
Logical OR (OR)
Exclusive OR (XOR)
Rotate Right Through Carry (RRC)
Rotate Left Through Carry (RLC)
Swap Nibbles of Accumulator (SWAP)
Push Data onto Stack (PUSH)
Pop Data off of Stack (POP)
The memory bit manipulation instructions allow the user to
Set Bit (SBIT)
Reset Bit (RBIT)
Reset Pending Bit (RPND)
If Equal (IFEQ)
If Not Equal (IFNE)
If Greater Than (IFGT)
If Carry (IFC)
If Not Carry (IFNC)
If Bit (IFBIT)
If B Pointer Not Equal (IFBNE)
And Skip if Zero (ANDSZ)
Decrement Register and Skip if Zero (DRSZ)
No-Operation (NOP)
mode, where the double byte vector associated with the interrupt is
transferred from adjacent addresses in the program memory into the
program counter (PC) in order to jump to the associated interrupt
service routine.
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