CS61884-IQZ Cirrus Logic Inc, CS61884-IQZ Datasheet - Page 13

• Manufacturer Part Number: CS61884-IQZ
• Description: IC,PCM TRANSCEIVER,OCTAL,CEPT PCM-30/E-1,QFP,144PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS61884-IQZ

• Rohs Compliant: YES

DS485F1
INTL/MOT/CODEN
SYMBOL
TXOE
CLKE
LQFP
114
115
88
FBGA
H12
E14
E13
TYPE
I
I
I
Motorola/Intel/Coder Mode Select Input
Parallel Host Mode - When this pin is “Low” the micropro-
cessor interface is configured for operation with Motorola
processors. When this pin is “High” the microprocessor in-
terface is configured for operation with Intel processors.
Hardware Mode - When the CS61884 is configured for uni-
polar operation, this pin, CODEN, configures the line
encoding/decoding function. When CODEN is low,
B8ZS/HDB3 encoders/decoders are enabled for T1/J1 or
E1 operation respectively. When CODEN is high, AMI en-
coding/decoding is activated. This is done for all eight
channels.
Transmitter Output Enable
Host mode - Operates the same as in hardware mode. In-
dividual drivers can be set to a high impedance state via
the
page 39).
Hardware Mode - When TXOE pin is asserted Low, all the
TX drivers are forced into a high impedance state. All other
internal circuitry remains active.
Clock Edge Select
In clock/data recovery mode, setting CLKE “high” will cause
RPOS/RNEG to be valid on the falling edge of RCLK and
SDO to be valid on the rising edge of SCLK. When CLKE is
set “low”, RPOS/RNEG is valid on the rising edge of RCLK,
and SDO is valid on the falling edge of SCLK. When the
part is operated in data recovery mode, the RPOS/RNEG
output polarity is active “high” when CLKE is set “high” and
active “low” when CLKE is set “low”.
Output Disable Register (12h)
DESCRIPTION
(See Section 14.19 on
CS61884
13