CS61884-IQZ Cirrus Logic Inc, CS61884-IQZ Datasheet - Page 36

• Manufacturer Part Number: CS61884-IQZ
• Description: IC,PCM TRANSCEIVER,OCTAL,CEPT PCM-30/E-1,QFP,144PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS61884-IQZ

• Rohs Compliant: YES

14.7 LOS Interrupt Enable Register (06h)
14.8 DFM Interrupt Enable Register (07h)
14.9
14.10
14.11 Software Reset Register (0Ah)
14.12 Performance Monitor Register (0Bh)
36
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:4]
BIT
BIT
BIT
BIT
BIT
BIT
LOS Interrupt Status Register (08h)
DFM Interrupt Status Register (09h)
DFME 7-0
LOSE 7-0 Any change in a LOS Status Register bits will cause the INT pin to go low if corresponding bit
RSVD 7-4
SRES 7-0 Writing to this register initializes all registers to their default settings. Register bits default to
DFMI 7-0
LOSI 7-0
NAME
NAME
NAME
NAME
NAME
NAME
in this register is set to “1”. Register bits default to 00h after power-up or reset.
Enables interrupts for failures detected by the DFM. Any change in a DFM Status Register bit
will cause an interrupt if the corresponding bit is set to “1” in this register. Register bits
default to 00h after power-up or reset.
Bit n of this register is set to “1” to indicate a status change in bit n of the LOS Status Regis-
ter. The bits in this register indicate a change in status since the last cleared LOS interrupt.
Register bits default to 00h after power-up or reset.
Bit n of this register is set to “1” to indicate a status change in bit n of the DFM Status Regis-
ter. The bits in this register indicate a change in status since the last cleared DFM interrupt.
Register bits default to 00h after power-up or reset.
00h after power-up or reset.
RESERVED (These bits must be set to 0.)
Description
Description
Description
Description
Description
Description
CS61884
DS485F1