DSPIC30F3013-20I/ML Microchip Technology, DSPIC30F3013-20I/ML Datasheet - Page 105

IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC

DSPIC30F3013-20I/ML

Manufacturer Part Number
DSPIC30F3013-20I/ML
Description
IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3013-20I/ML

Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Package
44QFN EP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
30
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F301320IML
15.0
This section describes the Universal Asynchronous
Receiver/Transmitter Communications module. The
dsPIC30F2011/2012/3012 processors have one UART
module (UART1). The dsPIC30F3013 processor has
two UART modules (UART1 and UART2).
FIGURE 15-1:
© 2010 Microchip Technology Inc.
Note:
UxTX
Note:
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART) MODULE
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
x = 1 or 2.
UART TRANSMITTER BLOCK DIAGRAM
Internal Data Bus
UTXBRK
Data
Parity
dsPIC30F2011/2012/3012/3013
0
1
’ (Start)
’ (Stop)
Generator
Parity
Write
Transmit Shift Register (UxTSR)
UTX8 UxTXREG Low Byte
15.1
The key features of the UART module are:
• Full-duplex, 8 or 9-bit data communication
• Even, odd or no parity options (for 8-bit data)
• One or two Stop bits
• Fully integrated Baud Rate Generator with 16-bit
• Baud rates range from 38 bps to 1.875 Mbps at a
• 4-word deep transmit data buffer
• 4-word deep receive data buffer
• Parity, framing and buffer overrun error detection
• Support for interrupt only on address detect
• Separate transmit and receive interrupts
• Loopback mode for diagnostic support
• Alternate receive and transmit pins for UART1
prescaler
30 MHz instruction rate
(9th bit = 1)
Load TSR
16 Divider
UART Module Overview
Write
Control
Signals
Control and Status bits
– Control TSR
– Control Buffer
– Generate Flags
– Generate Interrupt
Transmit Control
16x Baud Clock
from Baud Rate
Generator
DS70139G-page 105
UxTXIF

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