PIC16F610-E/ML Microchip Technology, PIC16F610-E/ML Datasheet - Page 104

1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE

PIC16F610-E/ML

Manufacturer Part Number
PIC16F610-E/ML
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F610-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F610/616/16HV610/616
10.4.6
In half-bridge applications where all power switches are
modulated at the PWM frequency, the power switches
normally require more time to turn off than to turn on. If
both the upper and lower power switches are switched
at the same time (one turned on, and the other turned
off), both switches may be on for a short period of time
until one switch completely turns off. During this brief
interval, a very high current (shoot-through current) will
flow through both power switches, shorting the bridge
supply. To avoid this potentially destructive shoot-
through current from flowing during switching, turning
on either of the power switches is normally delayed to
allow the other switch to completely turn off.
In Half-Bridge mode, a digitally programmable dead-
band delay is available to avoid shoot-through current
from destroying the bridge power switches. The delay
occurs at the signal transition from the non-active state
to the active state. See Figure 10-16 for illustration.
The lower seven bits of the associated PWM1CON
register (Register 10-3) sets the delay period in terms
of microcontroller instruction cycles (T
FIGURE 10-17:
DS41288F-page 104
Standard Half-Bridge Circuit (“Push-Pull”)
PROGRAMMABLE DEAD-BAND
DELAY MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
CY
or 4 T
P1A
P1B
OSC
).
FET
Driver
FET
Driver
FIGURE 10-16:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
(2)
(2)
V+
V-
(1)
2: Output signals are shown as active-high.
td
Pulse Width
PR2 register.
Load
Period
td
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
© 2009 Microchip Technology Inc.
+
V
-
+
V
-
(1)
Period
(1)

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