PIC16F610-E/ML Microchip Technology, PIC16F610-E/ML Datasheet - Page 59

1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE

PIC16F610-E/ML

Manufacturer Part Number
PIC16F610-E/ML
Description
1.75KB Flash, 64B RAM, 6 I/O, 8MHz Internal Oscillator 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F610-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
8.2
Each
Configuration register: CM1CON0 for Comparator C1
and CM2CON0 for Comparator C2. In addition,
Comparator C2 has a second control register,
CM2CON1, for controlling the interaction with Timer1 and
simultaneous reading of both comparator outputs.
The CM1CON0 and CM2CON0 registers (see Registers
8-1 and 8-2, respectively) contain the control and Status
bits for the following:
• Enable
• Input selection
• Reference selection
• Output selection
• Output polarity
8.2.1
Setting the CxON bit of the CMxCON0 register enables
the comparator for operation. Clearing the CxON bit
disables
consumption.
8.2.2
The CxCH<1:0> bits of the CMxCON0 register direct
one of four analog input pins to the comparator
inverting input.
8.2.3
Setting the CxR bit of the CMxCON0 register directs an
internal voltage reference or an analog input pin to the
non-inverting input of the comparator. See Section 8.11
“Comparator Voltage Reference” for more information
on the internal voltage reference module.
© 2009 Microchip Technology Inc.
Note:
comparator
Comparator Control
the
COMPARATOR ENABLE
COMPARATOR INPUT SELECTION
To use CxIN+ and CxIN- pins as analog
inputs, the appropriate bits must be set in
the ANSEL register and the corresponding
TRIS bits must also be set to disable the
output drivers.
COMPARATOR REFERENCE
SELECTION
comparator
has
a
for
separate
minimum
control
PIC16F610/616/16HV610/616
current
and
8.2.4
The output of the comparator can be monitored by
reading either the CxOUT bit of the CMxCON0 register
or the MCxOUT bit of the CM2CON1 register. In order
to make the output available for an external connection,
the following conditions must be true:
• CxOE bit of the CMxCON0 register must be set
• Corresponding TRIS bit must be cleared
• CxON bit of the CMxCON0 register must be set.
8.2.5
Inverting the output of the comparator is functionally
equivalent to swapping the comparator inputs. The
polarity of the comparator output can be inverted by
setting the CxPOL bit of the CMxCON0 register.
Clearing the CxPOL bit results in a non-inverted output.
Table 8-1 shows the output state versus input
conditions, including polarity control.
TABLE 8-1:
8.3
The comparator output is indeterminate for a period of
time after the change of an input source or the selection
of a new reference voltage. This period is referred to as
the response time. The response time of the
comparator differs from the settling time of the voltage
reference. Therefore, both of these times must be
considered when determining the total response time
to a comparator input change. See the Comparator and
Voltage Reference Specifications in Section 15.0
“Electrical Specifications” for more details.
Input Condition
CxV
CxV
CxV
CxV
Note 1: The CxOE bit overrides the PORT data
IN
IN
IN
IN
- > CxV
- < CxV
- > CxV
- < CxV
2: The internal output of the comparator is
Comparator Response Time
COMPARATOR OUTPUT SELECTION
COMPARATOR OUTPUT POLARITY
latch. Setting the CxON has no impact on
the port override.
latched with each instruction cycle.
Unless otherwise specified, external
outputs are not latched.
IN
IN
IN
IN
+
+
+
+
COMPARATOR OUTPUT
STATE VS. INPUT
CONDITIONS
CxPOL
0
0
1
1
DS41288F-page 59
CxOUT
0
1
1
0

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