PIC18F4580-I/ML Microchip Technology, PIC18F4580-I/ML Datasheet - Page 227

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC

PIC18F4580-I/ML

Manufacturer Part Number
PIC18F4580-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4580-I/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FIGURE 18-27:
FIGURE 18-28:
© 2009 Microchip Technology Inc.
SDA
SCL
SEN
BCLIF
S
SSPIF
S
BCLIF
SSPIF
SDA
SCL
SEN
BUS COLLISION DURING START CONDITION (SCL = 0)
BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
SDA pulled low by other master.
Reset BRG and assert SDA.
‘0’
‘0’
SCL = 0 before BRG time-out,
bus collision occurs. Set BCLIF.
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
Less than T
BRG
SDA = 0, SCL = 1
PIC18F2480/2580/4480/4580
SDA = 0, SCL = 1
SDA = 0, SCL = 1,
set SSPIF
T
Set SEN, enable START
sequence if SDA = 1, SCL = 1
BRG
S
Set S
T
BRG
T
BRG
Set SSPIF
SCL = 0 before SDA = 0,
bus collision occurs. Set BCLIF.
SCL pulled low after BRG
time-out
Interrupt cleared
in software
Interrupts cleared
in software
‘0’
‘0’
‘0’
DS39637D-page 227

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