SPC5604PGF0MLQ6 Freescale Semiconductor, SPC5604PGF0MLQ6 Datasheet - Page 17
SPC5604PGF0MLQ6
Manufacturer Part Number
SPC5604PGF0MLQ6
Description
IC MCU 32BIT 512KB FLASH 144LQFP
Manufacturer
Freescale Semiconductor
Series
MPC56xx Qorivvar
Datasheet
1.SPC5604PEF0MLL6.pdf
(99 pages)
Specifications of SPC5604PGF0MLQ6
Core Processor
e200z0h
Core Size
32-Bit
Speed
64MHz
Connectivity
CAN, FlexRay, LIN, SPI, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
108
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
64K x 8
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SPC5604PGF0MLQ6
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1.5.27
The ADC module provides the following features:
Analog part:
Digital part:
Freescale Semiconductor
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— Input capture trigger
— Output compare
— Double buffer (to capture rising edge and falling edge)
— Separate prescaler for each counter
— Selectable clock source
— 0–100% pulse measurement
— Rotation direction flag (Quad decoder mode)
Maximum count rate
— External event counting: max. count rate = peripheral clock/2
— Internal clock counting: max. count rate = peripheral clock
Counters are:
— Cascadable
— Preloadable
Programmable count modulo
Quadrature decode capabilities
Counters can share available input pins
Count once or repeatedly
Pins available as GPIO when timer functionality not in use
2 on-chip AD converters
— 10-bit AD resolution
— 1 sample and hold unit per ADC
— Conversion time, including sampling time, less than 1 µs (at full precision)
— Typical sampling time is 150 ns min. (at full precision)
— Differential non-linearity error (DNL) ±1 LSB
— Integral non-linearity error (INL) ±1.5 LSB
— TUE <3 LSB
— Single-ended input signal up to 5.0 V
— The ADC and its reference can be supplied with a voltage independent from V
— The ADC supply can be equal or higher than V
— The ADC supply and the ADC reference are not independent from each other (they are internally bonded to the
— Sample times of 2 (default), 8, 64, or 128 ADC clock cycles
2 × 13 input channels including 4 channels shared between the 2 converters
4 analog watchdogs comparing ADC results against predefined levels (low, high, range) before results are stored in
the appropriate ADC result location,
2 modes of operation: Normal mode or CTU control mode
Normal mode features
— Register-based interface with the CPU: control register, status register, 1 result register per channel
same pad)
Analog-to-digital converter (ADC) module
MPC5604P Microcontroller Data Sheet, Rev. 7
DDIO
DDIO
17