AD5421BREZ Analog Devices Inc, AD5421BREZ Datasheet - Page 11

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AD5421BREZ

Manufacturer Part Number
AD5421BREZ
Description
16bit Linearity Dac With Ref
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5421BREZ

Settling Time
50µs
Number Of Bits
16
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Pin No.
21
22, 23
24
25
26
27
28
EPAD
Mnemonic
C
R
LOOP−
V
DRIVE
REG
REG
Exposed Pad
EXT1
IN
LOOP
IN
OUT
, R
EXT2
Description
External Capacitor Connection and HART FSK Input. An external capacitor connected from C
implements an output slew rate control function (see the Loop Current Slew Rate Control section). HART FSK
signaling can also be coupled through a capacitor to this pin (see the HART Communications section).
Connection for External Current Setting Resistor. A precision 24 kΩ resistor can be connected between these
pins for improved performance.
Loop Current Return Pin.
Voltage Input Pin. Voltage input range is 0 V to 2.5 V. The voltage applied to this pin is digitized to eight bits,
which are available in the fault register. This pin can be used for general-purpose voltage monitoring, but
it is intended for monitoring of the loop supply voltage. Connecting the loop voltage to this pin via a 20:1
resistor divider allows the AD5421 to monitor and feed back the loop voltage. The AD5421 also generates
an alert if the loop voltage is close to the minimum operating value (see the Loop Voltage Fault section).
Gate Connection for External Depletion Mode MOSFET. For more information, see the Connection to Loop
Power Supply section.
Voltage Regulator Input. The loop voltage can be connected directly to this pin. Or, to reduce on-chip power
dissipation, an external pass transistor can be connected at this pin to stand off the loop voltage. For more
information, see the Connection to Loop Power Supply section. The REG
LOOP− pin with a 100 nF capacitor.
Voltage Regulator Output. Pin selectable values are from 1.8 V to 12 V via the REG_SEL0, REG_SEL1, and
REG_SEL2 pins (see the Voltage Regulator section).
The exposed paddle should be connected to the same potential as the COM pin and to a copper plane for
optimum thermal performance.
Rev. 0 | Page 11 of 32
IN
pin should be decoupled to the
IN
to COM
AD5421

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