AD5421BREZ Analog Devices Inc, AD5421BREZ Datasheet - Page 5

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AD5421BREZ

Manufacturer Part Number
AD5421BREZ
Description
16bit Linearity Dac With Ref
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5421BREZ

Settling Time
50µs
Number Of Bits
16
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Parameter
ADC ACCURACY
DV
DIGITAL INPUTS
DIGITAL OUTPUTS
FAULT THRESHOLDS
POWER REQUIREMENTS
1
2
3
4
5
6
Temperature range: −40°C to +105°C; typical at +25°C.
Total unadjusted error is the total measured error (offset error + gain error + linearity error + output drift over temperature) after factory calibration of the AD5421.
System level total error can be reduced using the offset and gain registers.
Guaranteed by design and characterization; not production tested.
The voltage between LOOP− and REG
The AD5421 is factory calibrated with an external 2.5 V reference connected to REFIN.
This is the current that the output is capable of sourcing. The load current originates from the loop and, therefore, contributes to the total current consumption figure.
Inductive Load
Capacitive Load
Die Temperature
V
Output Voltage
Externally Available Current
Short-Circuit Current
Load Regulation
Input High Voltage, V
Input Low Voltage, V
Hysteresis
Input Current
Pin Capacitance
SDO Pin
FAULT Pin
I
I
Temp 140°C
Temp 100°C
V
V
REG
IODV
Quiescent Current
DD
LOOP
LOOP
LOOP
LOOP
LOOP
Output Low Voltage, V
Output High Voltage, V
High Impedance Leakage
High Impedance Output
Output Low Voltage, V
Output High Voltage, V
OUTPUT
IN
Under
Over
Current
Capacitance
DD
Input
6V
12V
1
3
3
IL
IH
OL
OL
OH
OH
3, 6
IN
must be 5.5 V or greater.
Min
2
3.17
3.15
0.7 × IODV
−0.015
IODV
−0.01
IODV
5.5
1.71
DD
DD
− 0.5
− 0.5
DD
I
I
LOOP
LOOP
Typ
50
10
±5
±1
3.3
7.7
11
0.21
0.63
1.46
5
5
133
90
0.3
0.6
260
– 0.01% FSR
+ 0.01% FSR
Rev. 0 | Page 5 of 32
0.25 × IODV
Max
3.48
+0.015
0.4
+0.01
0.4
52
5.5
300
DD
Unit
mH
μF
°C
V
mA
mA
mV/mA
V
V
V
V
pF
V
μA
pF
V
mA
mA
°C
°C
V
V
V
V
μA
%
V
μA
V
V
Test Conditions/Comments
Stable operation
Stable operation
Can be overdriven up to 5.5 V
Assuming 4 mA flowing in the loop
and during HART communications
Measured at 0 mA and 3 mA loads
SCLK, SYNC, SDIN, LDAC
IODV
IODV
IODV
Per pin
Per pin
Fault removed when temperature
≤ 125°C
Fault removed when temperature
≤ 85°C
Fault removed when V
Fault removed when V
With respect to LOOP−
With respect to COM
DD
DD
DD
= 1.8 V
= 3.3 V
= 5.5 V
LOOP
LOOP
AD5421
≥ 0.4 V
≥ 0.7 V

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