AD5421BREZ Analog Devices Inc, AD5421BREZ Datasheet - Page 9

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AD5421BREZ

Manufacturer Part Number
AD5421BREZ
Description
16bit Linearity Dac With Ref
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5421BREZ

Settling Time
50µs
Number Of Bits
16
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ABSOLUTE MAXIMUM RATINGS
T
to 100 mA do not cause SCR latch-up.
Table 6.
Parameter
REG
REG
Digital Inputs to COM
Digital Inputs to COM
Digital Outputs to COM
REFIN to COM
REFOUT1, REFOUT2
V
LOOP− to COM
DV
IODV
R
R
DRIVE to COM
Operating Temperature Range (T
Storage Temperature Range
Junction Temperature (T
Power Dissipation
Lead Temperature,
ESD
LOOP
EXT1
EXT2
A
RANGE0, RANGE1, R
ALARM_CURRENT_DIRECTION,
REG_SEL0, REG_SEL1, REG_SEL2
SCLK, SDIN, SYNC, LDAC
SDO, FAULT
Industrial
Soldering (10 sec)
Human Body Model
Field Induced Charged Device
Machine Model
DD
= 25°C, unless otherwise noted. Transient currents of up
IN
OUT
, C
to COM
Model
DD
to COM
to COM
to COM
IN
to COM
to COM
to COM
INT
J MAX
/R
EXT
)
,
A
)
Rating
−0.3 V to +60 V
−0.3 V to +14 V
−0.3 V to DV
or +7 V (whichever is less)
−0.3 V to IODV
or +7 V (whichever is less)
−0.3 V to IODV
or +7 V (whichever is less)
−0.3 V to +7 V
−0.3 V to +4.7 V
−0.3 V to +60 V
−5 V to +0.3 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +4.3 V
−0.3 V to +0.3 V
−0.3 V to +11 V
−40°C to +105°C
−65°C to +150°C
125°C
(T
JEDEC Industry Standard
J-STD-020
3 kV
1.5 kV
200 V
J MAX
− T
A
)/θ
DD
JA
DD
DD
+ 0.3 V
+ 0.3 V
+ 0.3 V
Rev. 0 | Page 9 of 32
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
28-Lead TSSOP_EP (RE-28-2)
ESD CAUTION
JA
is specified for the worst-case conditions, that is, a device
θ
32
JA
θ
9
JC
AD5421
Unit
°C/W

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