AD5421BREZ Analog Devices Inc, AD5421BREZ Datasheet - Page 26

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AD5421BREZ

Manufacturer Part Number
AD5421BREZ
Description
16bit Linearity Dac With Ref
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5421BREZ

Settling Time
50µs
Number Of Bits
16
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD5421
CONTROL REGISTER
The control register is a read/write register and is addressed as described in Table 11. The data programmed to the control register
determines the mode of operation of the AD5421.
Table 16. Control Register Bit Map
Table 17. Control Register Bit Descriptions
Control Bits
SPI watchdog
timeout
SPI watchdog
timer
Auto fault
readback
Alarm on SPI
fault
Set min loop
current
Select ADC
input
On-chip ADC
Power down
internal
reference
V
alert
MSB
D15
SPI watchdog timeout
T0
LOOP
fault
D14
T1
D13
T2
Description
The T0, T1, and T2 bits allow the user to program the watchdog timeout period. The watchdog timer is reset when a valid
write to any AD5421 register occurs or when a NOP command is written.
T0
0
0
0
0
1
1
1
1
0 = SPI watchdog timer is enabled (default).
1 = SPI watchdog timer is disabled.
This bit specifies whether the fault register contents are automatically clocked out on the SDO pin on each write operation.
(The fault register can always be addressed for readback.)
0 = fault register contents are clocked out on the SDO pin (default).
1 = fault register contents are not clocked out on the SDO pin.
This bit specifies whether the loop current is forced to the alarm value when an SPI fault is detected (that is, the watchdog
timer times out). When an SPI fault is detected, the SPI fault bit of the fault register and the FAULT pin are always set.
0 = loop current is forced to the alarm value when an SPI fault is detected (default).
1 = loop current is not forced to the alarm value when an SPI fault is detected.
0 = normal operation (default).
1 = loop current is set to its minimum value so that the total current flowing in the loop consists only of the operating
current of the AD5421 and its associated circuitry.
0 = on-chip ADC measures the voltage between the V
1 = on-chip ADC measures the temperature of the AD5421 die.
0 = on-chip ADC is disabled (default).
1 = on-chip ADC is enabled.
0 = internal voltage reference is powered up (default).
1 = internal voltage reference is powered down and an external voltage reference source is required.
This bit specifies whether the FAULT pin is set when the voltage between the V
(The V
0 = FAULT pin is not set when the V
1 = FAULT pin is set when the V
D12
SPI
watchdog
timer
LOOP
T1
0
0
1
1
0
0
1
1
6V bit of the fault register is always set.)
D11
Auto fault
readback
T2
0
1
0
1
0
1
0
1
Timeout Period
50 ms
100 ms
500 ms
1 sec (default)
2 sec
3 sec
4 sec
5 sec
D10
Alarm on
SPI fault
LOOP
LOOP
− COM voltage falls to approximately 0.3 V.
− COM voltage falls to approximately 0.3 V.
D9
Set min
loop
current
Rev. 0 | Page 26 of 32
D8
Select
ADC
input
LOOP
and COM pins (default).
D7
On-chip
ADC
D6
Power down
internal
reference
LOOP
and COM pins falls to approximately 0.3 V.
D5
V
fault
alert
LOOP
D4
D3
Reserved
D2
D1
D0
LSB

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