AD9518-4A/PCBZ Analog Devices Inc, AD9518-4A/PCBZ Datasheet - Page 52

• Manufacturer Part Number: AD9518-4A/PCBZ
• Description: 6-Output Clock Generator With 2.8GHz
• Manufacturer: Analog Devices Inc

Specifications of AD9518-4A/PCBZ

• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9518-4A
• Primary Attributes: 2 Inputs, 14 Outputs, 1.6GHz VCO
• Secondary Attributes: LVPECL Output Logic
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9518-4
Reg.
Addr.
(Hex)
0x01B
Bits
7
6
5
[4:0]
Name
VCO
frequency monitor
REF2 ( REFIN )
frequency monitor
REF1 (REFIN)
frequency monitor
REFMON pin
control
Description
Enables or disables VCO frequency monitor.
0: disables VCO frequency monitor (default).
1: enables VCO frequency monitor.
Enables or disables REF2 frequency monitor.
0: disables REF2 frequency monitor (default).
1: enables REF2 frequency monitor.
REF1 (REFIN) frequency monitor enable; this is for both REF1 (single-ended) and REFIN (differential) inputs
(as selected by differential reference mode).
0: disables REF1 (REFIN) frequency monitor (default).
1: enables REF1 (REFIN) frequency monitor.
Selects the signal that is connected to the REFMON pin.
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Level or
Dynamic
Signal
LVL
DYN
DYN
DYN
DYN
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
DYN
DYN
DYN
DYN
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
Rev. A | Page 52 of 64
REF1 clock (differential reference when in differential mode).
REF2 clock (not available in differential mode).
Selected reference to PLL (differential reference when in differential mode).
Unselected reference to PLL (not available in differential mode).
(Status of REF1 frequency) AND (Status of REF2 frequency) .
(DLD) AND (Status of selected reference) AND (Status of VCO) .
Signal at REFMON Pin
Ground (dc) (default).
REF1 clock (differential reference when in differential mode).
REF2 clock (not available in differential mode).
Selected reference to PLL (differential reference when in differential mode).
Unselected reference to PLL (not available in differential mode).
Status of selected reference (status of differential reference); active high.
Status of unselected reference (not available in differential mode); active
high.
Status REF1 frequency; active high.
Status REF2 frequency; active high.
(Status REF1 frequency) AND (status REF2 frequency).
(DLD) AND (status of selected reference) AND (status of VCO).
Status of VCO frequency; active high.
Selected reference (low = REF1, high = REF2).
Digital lock detect (DLD); active low.
Holdover active; active high.
LD pin comparator output; active high.
VS (PLL supply).
Status of selected reference (status of differential reference); active low.
Status of unselected reference (not available in differential mode); active low.
Status of REF1 frequency; active low.
Status of REF2 frequency; active low.
Status of VCO frequency; active low.
Selected reference (low = REF2, high = REF1).
Digital lock detect (DLD); active low.
Holdover active; active low.
LD pin comparator output; active low.