AD9520-5BCPZ Analog Devices Inc, AD9520-5BCPZ Datasheet - Page 22

• Manufacturer Part Number: AD9520-5BCPZ
• Description: 12/24-Output Clock Generator
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9520-5BCPZ

• Design Resources: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:12, 2:24
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 1.6GHz
• Function: Clock Generator
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: LFCSP EP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9520-5
Figure 18. CMOS Output Swing vs. Frequency and Capacitive Load
–100
–110
–120
–130
–140
–150
–160
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
Figure 19. Additive (Residual) Phase Noise, CLK-to-LVPECL @
0
10
0
100
100
245.76 MHz, Divide-by-1
200
1k
FREQUENCY (MHz)
FREQUENCY (Hz)
10k
300
100k
400
1M
500
10M
600
2pF
10pF
20pF
100M
7
00
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–100
–110
–120
–130
–140
–150
–160
–110
–120
–130
–140
–150
–160
–170
Figure 20. Additive (Residual) Phase Noise, CLK-to-LVPECL @
Figure 21. Additive (Residual) Phase Noise, CLK-to-CMOS @
10
10
100
100
1k
1k
1600 MHz, Divide-by-1
50 MHz, Divide-by-20
FREQUENCY (Hz)
FREQUENCY (Hz)
10k
10k
100k
100k
1M
1M
10M
10M
100M
100M