AD9963BCPZRL Analog Devices Inc, AD9963BCPZRL Datasheet - Page 38

• Manufacturer Part Number: AD9963BCPZRL
• Description: Dual 16B, 200 MSPS D-A Converter
• Manufacturer: Analog Devices Inc

Specifications of AD9963BCPZRL

• Package / Case: 72-VFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9961/AD9963
TRANSMIT PATH
Tx Path General Description
The transmit section consists of two complete paths of
interpolation filters stages, each followed by a high speed
current output DAC. A data assembler receives interleaved data
from one of two digital interface ports, and de-interleaves and
buffers the data before supplying the data samples into the two
datapaths. The interpolation filter bank consists of three stages
that can be completely bypassed or cascaded to provide 2×, 4×,
or 8× interpolation. The supported clock rates for each of the
interpolation filters and the transmit DACs are listed in Table 1.
INTERPOLATION FILTERS
The I and Q transmit paths contain three interpolation filters
designated as INT0, INT1, and SRRC. Each of the interpolation
filters provides a 2× increase in output data rate. The filters can
be completely bypassed or cascaded to provide 2×, 4×, or 8×
upsampling ratios. The interpolation filters effectively increase
the DAC update rate while suppressing the images at the input
date rate. This reduces the requirements on the analog output
reconstruction filter.
The digital filters should be cascaded such that INT0 is enabled
for an interpolation factor of 2×, INT0 and INT1 should be
enabled for an interpolation factor of 4×, and INT0, INT1, and
the SRRC should be enabled for an interpolation factor of 8×.
The INT0 and INT1 filters have bandwidths of 40% of the input
data rate. Over their usable bandwidth, the filters have a passband
ripple of less than 0.1 dB. The SRRC has a roll-off factor of 0.22
with a 60 dB stop-band attenuation. In 2× and 4× interpolation
modes, the interpolation filters have an image rejection of greater
TRX PORT
FROM
TX PORT
FIFO
SRRC
SRRC_SCALE
Figure 48. Block Diagram of Transmit Datapath
0x35[4:0]
ASSEMBLER
Figure 47. Transmit Path Block Diagram
AND FIFO
SRRC_BP
DATA
0x30[2]
1
0
INT0
1/2/4/8×
1/2/4/8×
INT0_SCALE
LPF
LPF
0x36[4:0]
INT0_BP
0x30[3]
Q SCALE
I SCALE
1
0
TXVDD
R
INT1
FSADJ
INT1_SCALE
Q GAIN
Q DAC
I GAIN
0x37[4:0]
I DAC
INT1_BP
0x30[4]
1
0
TXIP
TXIN
TXCML
TXQP
TXQN
REFIO
TO
DAC
Rev. 0 | Page 38 of 60
than 70 dB. In 8× interpolation mode, the image rejection is
greater than 65 dB. The usable bandwidth of the filters is
typically limited by the stop-band attenuation they provide,
rather than the passband flatness. The transfer functions of the
interpolation filters configured for 2×, 4×, and 8× interpolation
ratios are shown in Figure 49 through Figure 51.
–10
–20
–30
–40
–50
–60
–70
–80
–10
–20
–30
–40
–50
–60
–70
–80
Figure 49. Digital Filter Transfer Function for 2× Interpolation
Figure 50. Digital Filter Transfer Function for 4× Interpolation
–10
–20
–30
–40
–50
–60
–70
–80
Figure 51. Digital Filter Transfer Function for 8× Interpolation
0
0
0
NORMALIZED FREQUENCY (Relative to f
NORMALIZED FREQUENCY (Relative to f
NORMALIZED FREQUENCY (Relative to f
DAC
DAC
DAC
)
)
)