CY7C1061AV33-12ZXCT Cypress Semiconductor Corp, CY7C1061AV33-12ZXCT Datasheet - Page 2

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CY7C1061AV33-12ZXCT

Manufacturer Part Number
CY7C1061AV33-12ZXCT
Description
CY7C1061AV33-12ZXCT
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1061AV33-12ZXCT

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
16M (1M x 16)
Speed
12ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document #: 38-05256 Rev. *G
Selection Guide
Pin Configurations
Notes
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
1. NC pins are not connected on the die.
2. DNU (Do Not Use) pins have to be left floating or tied to VSS to ensure proper operation.
NC
NC
NC
NC
NC
NC
IO
BLE
IO
V
IO
IO
V
A
1
CC
SS
18
14
15
8
9
[1, 2]
BHE
IO
IO
DNU
IO
OE
A
IO
2
8
10
12
13
11
60-ball FBGA
Top View
A
A
NC
A
A
A
A
A
3
14
17
12
9
0
3
5
A
A
A
A
A
A
A
A
4
15
13
10
16
1
4
6
7
IO
IO
CE
WE
IO
A
A
IO
Commercial
Industrial
Commercial/Industrial
5
11
2
5
4
1
1
3
CE
IO
V
IO
IO
IO
V
6
A
CC
SS
19
6
2
0
7
2
NC
NC
NC
NC
NC
NC
G
H
C
D
E
A
B
F
–10
275
275
10
50
IO
IO
IO
IO
BHE
CE
V
V
CE
V
V
WE
V
A
A
IO
A
A
A
IO
IO
IO
CC
CC
A
A
A
A
CC
CY7C1061AV33
SS
A
SS
12
13
14
15
19
18
17
16
15
–12
260
260
2
4
3
2
1
0
12
50
1
0
1
2
3
54-pin TSOP II
(Top View)
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
1
2
3
4
5
6
7
8
9
10
11
12
54
53
52
50
49
43
42
40
39
38
37
36
35
34
33
32
31
30
29
28
51
48
47
46
45
44
41
Page 2 of 10
IO
V
IO
V
V
V
Unit
IO
V
IO
A
A
A
A
A
NC
DNU
A
A
A
A
A
OE
BLE
IO
IO
IO
IO
mA
mA
ns
SS
SS
SS
CC
CC
5
6
7
8
9
10
11
12
13
14
11
9
10
8
7
6
5
4
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