DSPIC33EP256MU810-I/PT Microchip Technology, DSPIC33EP256MU810-I/PT Datasheet - Page 156

• Manufacturer Part Number: DSPIC33EP256MU810-I/PT
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 83
• Flash Memory Size: 280KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 8-11:
DS70616E-page 156
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
PWCOL7
U-0
R-0
—
Unimplemented: Read as ‘0’
PWCOL14: Channel 14 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL13: Channel 13 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL12: Channel 12 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL11: Channel 11 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL10: Channel 10 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL9: Channel 9 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL8: Channel 8 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL7: Channel 7 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL6: Channel 6 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL5: Channel 5 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL4: Channel 4 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL3: Channel 3 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL14
PWCOL6
R-0
R-0
DMAPWC: DMA PERIPHERAL WRITE COLLISION STATUS
REGISTER
W = Writable bit
‘1’ = Bit is set
PWCOL13
PWCOL5
R-0
R-0
PWCOL12
PWCOL4
R-0
R-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PWCOL11
PWCOL3
R-0
R-0
PWCOL10
PWCOL2
R-0
R-0
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x = Bit is unknown
PWCOL9
PWCOL1
R-0
R-0
PWCOL8
PWCOL0
R-0
R-0
bit 8
bit 0