DSPIC33EP256MU810-I/PT Microchip Technology, DSPIC33EP256MU810-I/PT Datasheet - Page 39

• Manufacturer Part Number: DSPIC33EP256MU810-I/PT
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 83
• Flash Memory Size: 280KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

REGISTER 3-2:
 2009-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-12
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
Note 1:
SATA
R/W-0
R/W-0
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
VAR
2:
3:
(1)
This bit is available on dsPIC33EPXXXMU806/810/814 devices only.
This bit is always read as ‘0’.
The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.
VAR: Variable Exception Processing Latency Control bit
1 = Variable exception processing enabled
0 = Fixed exception processing enabled
Unimplemented: Read as ‘0’
US<1:0>: DSP Multiply Unsigned/Signed Control bits
11 = Reserved
10 = DSP engine multiplies are mixed-sign
01 = DSP engine multiplies are unsigned
00 = DSP engine multiplies are signed
EDT: Early DO Loop Termination Control bit
1 = Terminate executing DO loop at end of current loop iteration
0 = No effect
DL<2:0>: DO Loop Nesting Level Status bits
111 = 7 DO loops active
•
•
•
001 = 1 DO loop active
000 = 0 DO loops active
SATA: AccA Saturation Enable bit
1 = Accumulator A saturation enabled
0 = Accumulator A saturation disabled
SATB: AccB Saturation Enable bit
1 = Accumulator B saturation enabled
0 = Accumulator B saturation disabled
SATDW: Data Space Write from DSP Engine Saturation Enable bit
1 = Data space write saturation enabled
0 = Data space write saturation disabled
ACCSAT: Accumulator Saturation Mode Select bit
1 = 9.31 saturation (super saturation)
0 = 1.31 saturation (normal saturation)
IPL3: CPU Interrupt Priority Level Status bit 3
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
SATB
R/W-0
U-0
—
CORCON: CORE CONTROL REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
SATDW
R/W-0
R/W-1
US<1:0>
(1)
ACCSAT
(1)
R/W-0
R/W-0
Preliminary
(1)
(1,2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EDT
(3)
IPL3
R/W-0
R/C-0
(1,2)
(3)
SFA
R-0
R-0
x = Bit is unknown
DL<2:0>
RND
R/W-0
R-0
(1)
(1)
DS70616E-page 39
R/W-0
IF
R-0
(1)
bit 8
bit 0