DSPIC33EP256MU810-I/PT Microchip Technology, DSPIC33EP256MU810-I/PT Datasheet - Page 385

• Manufacturer Part Number: DSPIC33EP256MU810-I/PT
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 83
• Flash Memory Size: 280KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

REGISTER 23-1:
 2009-2011 Microchip Technology Inc.
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
2:
3:
This bit is only available in the ADC1 module. In the ADC2 module, this bit is unimplemented and is read
as ‘0’.
This setting is available in dsPIC33EPXXXMU806/810/814 devices only.
Do not clear the DONE bit in software if ADC Sample Auto-Start is enabled (ASAM = 1).
SSRC<2:0>: Sample Clock Source Select bits
If SSRCG = 1:
111 = Reserved
110 = PWM Generator 7 primary trigger compare ends sampling and starts conversion
101 = PWM Generator 6 primary trigger compare ends sampling and starts conversion
100 = PWM Generator 5 primary trigger compare ends sampling and starts conversion
011 = PWM Generator 4 primary trigger compare ends sampling and starts conversion
010 = PWM Generator 3 primary trigger compare ends sampling and starts conversion
001 = PWM Generator 2 primary trigger compare ends sampling and starts conversion
000 = PWM Generator 1 primary trigger compare ends sampling and starts conversion
If SSRCG = 0:
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = Reserved
101 = PWM secondary Special Event Trigger ends sampling and starts conversion
100 = Timer5 compare ends sampling and starts conversion
011 = PWM primary Special Event Trigger ends sampling and starts conversion
010 = Timer3 compare ends sampling and starts conversion
001 = Active transition on the INT0 pin ends sampling and starts conversion
000 = Clearing the Sample bit (SAMP) ends sampling and starts conversion (Manual mode)
SSRCG: Sample Clock Source Group bit
[See bits 7-5 for details.]
SIMSAM: Simultaneous Sample Select bit (only applicable when CHPS<1:0> = 01 or 1x)
When AD12B = 1, SIMSAM is: U-0, Unimplemented, Read as ‘0’
1 = Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS<1:0> = 1x); or
0 = Samples multiple channels individually in sequence
ASAM: ADC Sample Auto-Start bit
1 = Sampling begins immediately after last conversion. SAMP bit is auto-set.
0 = Sampling begins when SAMP bit is set
SAMP: ADC Sample Enable bit
1 = ADC S&H amplifiers are sampling
0 = ADC S&H amplifiers are holding
If ASAM = 0, software can write ‘1’ to begin sampling. Automatically set by hardware if ASAM = 1.
If SSRC = 000, software can write ‘0’ to end sampling and start conversion. If SSRC 000,
automatically cleared by hardware to end sampling and start conversion.
DONE: ADC Conversion Status bit
1 = ADC conversion cycle is completed.
0 = ADC conversion not started or in progress
Automatically set by hardware when A/D conversion is complete. Software can write ‘0’ to clear DONE
status (software not allowed to write ‘1’). Clearing this bit does NOT affect any operation in progress.
Automatically cleared by hardware at start of a new conversion.
Samples CH0 and CH1 simultaneously (when CHPS<1:0> = 01)
ADxCON1: ADCx CONTROL REGISTER 1 (CONTINUED)
Preliminary
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DS70616E-page 385
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