DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 393

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DSPIC33EP512MU810T-I/PT

Manufacturer Part Number
DSPIC33EP512MU810T-I/PT
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810T-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 23-7:
 2009-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-13
bit 12-8
bit 7
bit 6-5
bit 4-0
Note 1:
CH0NB
CH0NA
R/W-0
R/W-0
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
The AN16 through AN31 pins are not available for the ADC2 module. The AN16 through AN23 pins are
not available for dsPIC33EP256MU806 (64-pin) devices.
CH0NB: Channel 0 Negative Input Select for Sample B bit
Same definition as bit 7.
Unimplemented: Read as ‘0’
CH0SB<4:0>: Channel 0 Positive Input Select for Sample B bits
Same definition as bit<4:0>.
CH0NA: Channel 0 Negative Input Select for Sample A bit
1 = Channel 0 negative input is AN1
0 = Channel 0 negative input is V
Unimplemented: Read as ‘0’
CH0SA<4:0>: Channel 0 Positive Input Select for Sample A bits
11111 = Channel 0 positive input is AN31
11110 = Channel 0 positive input is AN30
00010 = Channel 0 positive input is AN2
00001 = Channel 0 positive input is AN1
00000 = Channel 0 positive input is AN0
U-0
U-0
ADxCHS0: ADCx INPUT CHANNEL 0 SELECT REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
R/W-0
R/W-0
REFL
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
CH0SB<4:0>
CH0SA<4:0>
R/W-0
R/W-0
(1)
(1)
(1)
(1)
x = Bit is unknown
R/W-0
R/W-0
DS70616E-page 393
R/W-0
R/W-0
bit 8
bit 0

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