DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 98

• Manufacturer Part Number: DSPIC33EP512MU810T-I/PT
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-41:
TABLE 4-42:
TABLE 4-43:
REFOCON
Legend:
NVMCON
NVMADR
NVMADRU
NVMKEY
Legend:
RCON
OSCCON
CLKDIV
PLLFBD
OSCTUN
ACLKCON3 0758
ACLKDIV3
Legend:
Note
File Name
File Name
File Name
1:
2:
Addr.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register reset values dependent on type of reset.
OSCCON register reset values dependent on configuration fuses, and by type of reset.
074E
0740
0742
0744
0746
0748
075A
Addr.
0728
072A
072C
072E
REFERENCE CLOCK REGISTER MAP
NVM REGISTER MAP
SYSTEM CONTROL REGISTER MAP
ENAPLL
TRAPR
ROON
Bit 15
Bit 15
ROI
—
—
—
—
Bit 15
WR
—
—
IOPUWR
APLLCK
Bit 14
Bit 14
WREN
—
Bit 14
—
—
—
—
—
COSC<2:0>
DOZE<2:0>
ROSSLP
SELACLK
Bit 13
WRERR
Bit 13
Bit 13
—
—
—
—
—
—
ROSEL
NVMSIDL
Bit 12
Bit 12
Bit 12
AOSCMD<1:0>
—
—
—
—
—
—
Bit 11
VREGSF
DOZEN
Bit 11
Bit 11
—
—
—
—
—
—
—
Bit 10
ASRCSEL
Bit 10
Bit 10
RODIV<3:0>
—
—
—
—
—
—
—
FRCDIV<2:0>
NOSC<2:0>
Bit 9
FRCSEL
Bit 9
—
—
—
Bit 9
CM
—
—
—
Bit 8
Bit 8
NVMADR<15:0>
—
—
—
VREGS
Bit 8
—
—
—
Bit 7
—
Bit 7
CLKLOCK
—
EXTR
Bit 7
PLLPOST<1:0>
—
—
APLLPOST2<2:0>
Bit 6
—
Bit 6
—
IOLOCK
Bit 6
SWR
—
—
Bit 5
—
Bit 5
—
SWDTEN
LOCK
Bit 5
—
—
PLLDIV<8:0>
NVMADR<23:16>
Bit 4
NVMKEY<7:0>
—
Bit 4
—
WDTO
Bit 4
—
—
—
Bit 3
Bit 3
SLEEP IDLE
—
Bit 3
CF
—
—
TUN<5:0>
Bit 2
PLLPRE<4:0>
Bit 2
—
Bit 2
NVMOP<3:0>
—
APLLPRE<2:0>
LPOSCEN
APLLDIV<2:0>
Bit 1
Bit 1
Bit 1
BOR
—
OSWEN Note 2
Bit 0
Bit 0
—
Bit 0
POR
Resets
0000
Resets
Resets
Note 1
0000
0000
0000
0000
3040
0030
0000
0000
0000
All
All
All