CP3BT10G38 National Semiconductor, CP3BT10G38 Datasheet - Page 111

• Manufacturer Part Number: CP3BT10G38
• Description: IC CPU RISC W/LLC&USB 100-LQFP
• Manufacturer: National Semiconductor

Specifications of CP3BT10G38

• Applications: Connectivity Processor
• Core Processor: CR16C
• Program Memory Type: FLASH (256 kB)
• Controller Series: CP3000
• Ram Size: 10K x 8
• Interface: Bluetooth, ACCESS.bus, Audio, UART, USB, Microwire/SPI
• Number Of I /o: 37
• Voltage - Supply: 2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *CP3BT10G38

The CVSD/PCM module only supports indirect DMA trans-
fers. Therefore, transferring PCM data between the CVSD/
PCM module and another on-chip module requires two bus
cycles.
The trigger for DMA may also trigger an interrupt if the cor-
responding enable bits in the CVCTRL register is set.
Therefore care must be taken when setting the desired in-
terrupt and DMA enable bits. The following conditions must
be avoided:
18.8
The CVSD/PCM module provides support for an In-System-
Emulator by means of a special FREEZE input. While
FREEZE is asserted the module will exhibit the following be-
havior:
18.9
Table 43 lists the CVSD/PCM registers.
Setting the PCMINT bit and either of the DMAPO or
DMAPI bits.
Setting the CVSDINT bit and either of the DMACO or
DMACI bits.
CVSD In FIFO will not have data removed by the con-
verter core.
CVSD Out FIFO will not have data added by the convert-
er core.
PCM Out buffer will not be updated by the converter
core.
The Clear-on-Read function of the following status bits in
the CVSTAT register is disabled:
CVSDOUT
LINEARIN
PCMOUT
LOGOUT
CVSDIN
PCMIN
LOGIN
Name
FREEZE
CVSD/PCM CONVERTER REGISTERS
Table 43 CVSD/PCM Registers
PCMINT
CVE
CVF
FF FC2Ah
FF FC2Ch
FF FC20h
FF FC22h
FF FC24h
FF FC26h
FF FC28h
Address
Data Output Register
Data Input Register
Data Input Register
CVSD Data Output
PCM Data Output
Logarithmic PCM
Logarithmic PCM
CVSD Data Input
PCM Data Input
Description
Linear PCM
Register
Register
Register
Register
111
18.9.1
The CVSDIN register is a 16-bit wide, write-only register. It
is used to write CVSD data into the CVSD to PCM converter
FIFO. The FIFO is 8 words deep. The CVSDIN bit 15 repre-
sents the CVSD data bit at t = t
the CVSD data bit at t = t
18.9.2
The CVSDOUT register is a 16-bit wide read-only register.
It is used to read the CVSD data from the PCM to CVSD
converter. The FIFO is 8 words deep. Reading the CVSD-
OUT register after reset returns undefined data.
18.9.3
The PCMIN register is a 16-bit wide write-only register. It is
used to write PCM data to the PCM to CVSD converter via
the peripheral bus. It is double-buffered, providing a 125 µs
period for an interrupt or DMA request to respond.
18.9.4
The PCMOUT register is a 16-bit wide read-only register. It
is used to read PCM data from the CVSD to PCM converter.
It is double-buffered, providing a 125 µs period for an inter-
rupt or DMA request to respond. After reset the PCMOUT
register is clear.
LINEAROUT
15
15
15
15
CVCTRL
CVSTAT
Name
CVSD Data Input Register (CVSDIN)
CVSD Data Output Register (CVSDOUT)
PCM Data Input Register (PCMIN)
PCM Data Output Register (PCMOUT)
Table 43 CVSD/PCM Registers
FF FC2Eh
FF FC30h
FF FC32h
Address
CVSDOUT
PCMOUT
0
CVSDIN
PCMIN
- 250 ms.
0
, CVSDIN bit 0 represents
CVSD Status Register
Data Output Register
CVSD Control Regis-
Description
Linear PCM
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0
0
0
0