BF1105WR T/R NXP Semiconductors, BF1105WR T/R Datasheet

RF MOSFET Small Signal TAPE-7 MOS-RFSS

BF1105WR T/R

Manufacturer Part Number
BF1105WR T/R
Description
RF MOSFET Small Signal TAPE-7 MOS-RFSS
Manufacturer
NXP Semiconductors
Datasheet

Specifications of BF1105WR T/R

Configuration
Single Dual Gate
Transistor Polarity
N-Channel
Drain-source Breakdown Voltage
7 V
Gate-source Breakdown Voltage
7 V
Continuous Drain Current
0.03 A
Power Dissipation
200 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
Package / Case
SOT-4
Application
VHF/UHF
Channel Type
N
Channel Mode
Enhancement
Drain Source Voltage (max)
7V
Power Gain (typ)@vds
38@5VdB
Noise Figure (max)
2.5dB
Frequency (max)
1GHz
Package Type
CMPAK
Pin Count
3 +Tab
Input Capacitance (typ)@vds
2.2@5V@Gate 1/1.6@5V@Gate 2pF
Output Capacitance (typ)@vds
1.2@5VpF
Reverse Capacitance (typ)
0.025@5VpF
Operating Temp Range
-65C to 150C
Mounting
Surface Mount
Number Of Elements
1
Power Dissipation (max)
200mW
Screening Level
Military
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
BF1105WR,115
Product specification
Supersedes data of 1997 Dec 01
DATA SHEET
BF1105; BF1105R; BF1105WR
N-channel dual-gate MOS-FETs
DISCRETE SEMICONDUCTORS
1997 Dec 02

Related parts for BF1105WR T/R

BF1105WR T/R Summary of contents

Page 1

DATA SHEET BF1105; BF1105R; BF1105WR N-channel dual-gate MOS-FETs Product specification Supersedes data of 1997 Dec 01 DISCRETE SEMICONDUCTORS 1997 Dec 02 ...

Page 2

... NXP Semiconductors N-channel dual-gate MOS-FETs FEATURES  Short channel transistor with high forward transfer admittance to input capacitance ratio  Low noise gain controlled amplifier GHz.  Internal self-biasing circuit to ensure good cross-modulation performance during AGC and good DC stabilization. APPLICATIONS  VHF and UHF applications with 5 V ...

Page 3

... NXP Semiconductors N-channel dual-gate MOS-FETs LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER V drain-source voltage DS I drain current D I gate 1 current G1 I gate 2 current G2 P total power dissipation tot T storage temperature stg T operating junction temperature j Note 1 ...

Page 4

... NXP Semiconductors N-channel dual-gate MOS-FETs THERMAL CHARACTERISTICS SYMBOL R thermal resistance from junction to ambient in free air th j-a R thermal resistance from junction to soldering point th j-s Note 1. Device mounted on a printed-circuit board. STATIC CHARACTERISTICS = 25 C unless otherwise specified SYMBOL PARAMETER V drain-source breakdown voltage (BR)DSS ...

Page 5

... NXP Semiconductors N-channel dual-gate MOS-FETs 25 handbook, halfpage I D (mA G2  Fig.5 Output characteristics; typical values. 40 handbook, halfpage y fs (mS  Fig.7 Forward transfer admittance as a function of drain current; typical values. 1997 Dec 02 MGM244 handbook, halfpage 1.7 V (mA) 1.6 V 1.5 V 1.4 V 1 ...

Page 6

... NXP Semiconductors N-channel dual-gate MOS-FETs 16 handbook, halfpage I D (mA G2  Fig.9 Drain current as a function of drain-source voltage; typical values. 110 handbook, halfpage V unw (dBμV) 100 G2nom Dnom self bias = 25  MHz; T unw amb Fig.11 Unwanted voltage for 1% cross-modulation as a function of gain reduction; ...

Page 7

... NXP Semiconductors N-channel dual-gate MOS-FETs 2 10 handbook, halfpage y is (mS −1 10 − G2  mA amb Fig.12 Input admittance as a function of frequency; typical values handbook, halfpage | (mS ϕ G2  mA amb Fig.14 Forward transfer admittance and phase as a function of frequency; typical values. 1997 Dec 02 MGM251 10 handbook, halfpage | (μ ...

Page 8

... NXP Semiconductors N-channel dual-gate MOS-FETs handbook, full pagewidth input 50 Ω mS 0.5 mS 200 MHz nH, 4 turns, internal diameter = 4 mm, 0.8 mm copper wire 160 nH, 3 turns, internal diameter = 8 mm, 0.8 mm copper wire; tapped at approximately half a turn from the cold side, to set G C1 adjusted for ...

Page 9

... NXP Semiconductors N-channel dual-gate MOS-FETs handbook, full pagewidth Table 1 Scattering parameters MAGNITUDE ANGLE (MHz) (ratio) (deg) 3.8 50 0.994 7.5 100 0.991 14.7 200 0.982 21.7 300 0.968 28.8 400 0.956 35.4 500 0.937 41.8 600 0.918 48.1 700 0.897 54.0 800 0.878  ...

Page 10

... NXP Semiconductors N-channel dual-gate MOS-FETs PACKAGE OUTLINES Plastic surface-mounted package; 4 leads DIMENSIONS (mm are the original dimensions UNIT max 1.1 0.48 0.88 0.1 mm 0.9 0.38 0.78 OUTLINE VERSION IEC SOT143B 1997 Dec scale 0.15 3.0 1.4 1.9 1.7 0.09 2.8 1.2 REFERENCES ...

Page 11

... NXP Semiconductors N-channel dual-gate MOS-FETs Plastic surface-mounted package; reverse pinning; 4 leads DIMENSIONS (mm are the original dimensions UNIT max 1.1 0.48 0.88 0.1 mm 0.9 0.38 0.78 OUTLINE VERSION IEC SOT143R 1997 Dec scale 0.15 3.0 1.4 1.9 1.7 0.09 2.8 1.2 REFERENCES ...

Page 12

... NXP Semiconductors N-channel dual-gate MOS-FETs Plastic surface-mounted package; reverse pinning; 4 leads DIMENSIONS (mm are the original dimensions UNIT max 0.4 1.1 0.7 mm 0.1 0.3 0.5 0.8 OUTLINE VERSION IEC SOT343R 1997 Dec scale 0.25 2.2 1.35 1.3 1.15 0.10 1.8 1.15 REFERENCES ...

Page 13

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the ...

Page 14

... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 15

... Interface, Security and Digital Processing expertise Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version. ...

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