M41T94MQ6 STMicroelectronics, M41T94MQ6 Datasheet - Page 21

• Manufacturer Part Number: M41T94MQ6
• Description: Real Time Clock Serial 512 (64x8)
• Manufacturer: STMicroelectronics

Specifications of M41T94MQ6

• Function: Clock, Calendar, Alarm, Timer Interrupt
• Rtc Memory Size: 64 B
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial
• Package / Case: SO-16
• Time Format: HH:MM:SS:hh
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M41T94
4.4
Note:
4.5
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the Watchdog
register, address 09h. bits BMB4-BMB0 store a binary multiplier and the two lower order bits
RB1-RB0 select the resolution, where 00 =
and 11 = 4 seconds. The amount of time-out is then determined to be the multiplication of
the five-bit multiplier value with the resolution. (For example: writing 00001110 in the
Watchdog register = 3*1 or 3 seconds).
Accuracy of timer is within ± the selected resolution.
If the processor does not reset the timer within the specified period, the M41T94 sets the
WDF (watchdog flag) and generates a watchdog interrupt or a microprocessor reset. WDF
is reset by reading the flags register (0Fh).
The most significant bit of the watchdog register is the watchdog steering bit (WDS). When
set to a '0,' the watchdog will activate the IRQ/FT/OUT pin when timed-out. When WDS is
set to a '1,' the watchdog will output a negative pulse on the RST pin for t
register and the AFE, ABE, SQWE, and FT bits will reset to a '0' at the end of a watchdog
time-out when the WDS bit is set to a '1.'
The watchdog timer can be reset by two methods:
1.
2.
The time-out period then starts over. The WDI pin should be tied to V
to perform a software reset of the watchdog timer, the original time-out period can be written
into the watchdog register, effectively restarting the count-down cycle.
Should the watchdog timer time-out, and the WDS bit is programmed to output an interrupt,
a value of 00h needs to be written to the watchdog register in order to clear the IRQ/FT/OUT
pin. This will also disable the watchdog function until it is again programmed correctly. A
READ of the flags register will reset the watchdog flag (bit D7; register 0Fh).
The watchdog function is automatically disabled upon power-up and the watchdog register
is cleared. If the watchdog function is set to output to the IRQ/FT/OUT pin and the frequency
test (FT) function is activated, the watchdog function prevails and the frequency test function
is denied.
Square wave output
The M41T94 offers the user a programmable square wave function which is output on the
SQW pin. RS3-RS0 bits located in 13h establish the square wave output frequency. These
frequencies are listed in Table
frequency has been completed, the SQW pin can be turned on and off under software
control with the square wave enable bit (SQWE) located in register 0Ah.
a transition (high-to-low or low-to-high) can be applied to the watchdog input pin (WDI),
or
the microprocessor can perform a WRITE of the watchdog register.
Table 6 on page
1
/
16
22. Once the selection of the SQW
second, 01 =
1
/
4
second, 10 = 1 second,
SS
if not used. In order
REC
Clock operations
. The watchdog
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